Publication List

Scalable Synchronization

2024

“Buffered Persistence in B+ Trees,” by M. Du and M. L. Scott. Proceedings of the ACM on Management of Data, Dec. 2024. Also ACM SIGMOD/PODS Intl. Conf. on Management of Data, Berlin, Germany, June 2025.
Shared-Memory Synchronization, 2nd edition, by M. L. Scott and T. Brown.

2023

“Transactional Composition of Nonblocking Data Structures,” by W. Cai, H. Wen, and M. L. Scott. 35th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), Orlando, FL, June 2023. Earlier version available as arXiv:2301.00996 [cs.DC], Jan. 2023. Poster paper / brief announcement presented at the 28th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), Montréal, PQ, Canada, Feb.–Mar. 2023.

2022

“How Should We Think About Persistent Data Structures?,” by M. L. Scott. 41st ACM Symp. on Principles of Distributed Computing (PODC), Salerno, Italy, July 2022.

2021

“Fast Nonblocking Persistence for Concurrent Data Structures,” by W. Cai, H. Wen, V. Maksimovski, M. Du, R. Sanna, S. Abdallah, and M. L. Scott. 35th Intl. Symp. on Distributed Computing (DISC), Freiburg, Germany, Oct. 2021. Extended version available as arXiv:2105.09508 [cs.DC], August 2021. Abstract presented at the 13th Annual Non-Volatile Memories Workshop (NVMW), San Diego, CA, May 2022.

“Suggested Draft TS for C++ Extensions for Minimal Transactional Memory,” by Hans Boehm, Victor Luchangco, Jens Maurer, Michael L. Scott, Michael Spear, and Michael Wong. Document number P2066R10, Programming Language C++, SG5, Intl. Organization for Standardization, Sep. 2021. Previous drafts: documents P2066R9, Sep. 2021; P2066R8, July 2021; P2066R7, May 2021; P2066R6, Mar. 2021; P2066R5, Feb. 2021; P2066R4, Oct. 2020; P2066R3, Sep. 2020; P2066R2, Mar. 2020; P2066R1, Feb. 2020; P2066R0, Jan. 2020.

“A Fast, General System for Buffered Persistent Data Structures,” by H. Wen, W. Cai, M. Du, L. Jenkins, B. Valpey, and M. L. Scott. 50th Intl. Conf. on Parallel Processing (ICPP), Aug. 2021. Also “Building Fast Recoverable Persistent Data Structures with Montage,” brief announcement, 34th Intl. Symp. on Distributed Computing (DISC), Oct. 2020 (without Jenkins as co-author). Second short version (with Jenkins) presented as “Building Fast Recoverable Persistent Data Structures,” 12th Non-Volatile Memories Workshop (NVMW), Mar. 2021. Earlier, extended version available as “Montage: A General System for Buffered Durably Linearizable Data Structures.” arXiv:2009.13701 [cs.DC], Sep. 2020.

“Transactional Memory Lite Support in C++,” by M. Spear, H. Boehm, V. Luchangco, M. L. Scott, and M. Wong. Document number P1875R2, Programming Language C++, SG5, Intl. Organization for Standardization, Mar. 2021. Previous drafts: documents P1875R1,July 2020; P1875R0, Oct. 2019.

2020

“Nonblocking Persistent Software Transactional Memory,” by by H. Alan Beadle, Wentao Cai, Haosen Wen, and Michael L. Scott. 27th Intl. Conf. on High Performance Computing, Data, and Analytics (HiPC), Dec. 2020. Also poster / brief announcement, 25th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), San Diego, CA, Feb. 2020. Earlier version published as “Towards Efficient Nonblocking Persistent Software Transactional Memory,” TR 1006, Computer Science Dept., Univ. of Rochester, Apr. 2019.

“Safe, Fast Sharing of memcached as a Protected Library,” by C. Kjellqvist, M. Hedayati, and M. L. Scott. 49th Intl. Conf. on Parallel Processing (ICPP), Aug. 2020.

“Understanding and Optimizing Persistent Memory Allocation,” by W. Cai, H. Wen, H. A. Beadle, C. Kjellqvist, M. Hedayati, and M. L. Scott. 19th Intl. Symp. on Memory Management (ISMM), June 2020. Poster / brief announcement presented at the 25th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), San Diego, CA, Feb. 2020. Expanded version available as TR 1008, Computer Science Dept., Univ. of Rochester, March 2020. Also arXiv:2003.06718 [cs.DC], Mar. 2020.

“Persistent Memory Analysis Tool (PMAT),” by L. Jenkins and M. L. Scott. Poster presentation, 11th Non-Volatile Memories Workshop (NVMW), San Diego, CA, Mar. 2020.

2019

“Improving Haskell Transactional Memory,” by Ryan Yates. Ph.D. dissertation, Computer Science Department, University of Rochester, 2019.

“Simplifying Transactional Memory Support in C++,” by P. Zardoshti, T. Zhou, P. Balaji, M. L. Scott, and M. Spear. ACM Transactions on Architecture and Code Optimization, Aug. 2019. Also selected for presentation at the 15th Intl. Conf. on High Performance Embedded Architecture and Compilers (HiPEAC), Bologna, Italy, Jan. 2020.

“Multi-Queue Fair Queueing,” by M. Hedayati, M. L. Scott, K. Shen, and Mike Marty. Usenix Annual Technical Conf., Renton, WA, July 2019. Preliminary version available as TR 1005, Computer Science Dept., Univ. of Rochester, Oct. 2018.

“Hodor: Intra-Process Isolation for High-Throughput Data Plane Libraries,” by M. Hedayati, S. Gravani, E. Johnson, J. Criswell, M. L. Scott, K. Shen, and Mike Marty. Usenix Annual Technical Conference, Renton, WA, July 2019. Preliminary version (with a different title) available as TR 1004, Computer Science Dept., Univ. of Rochester, Aug. 2018.

“IskiOS: Lightweight Defense Against Kernel-Level Code-Reuse Attacks,” by Spyridoula Gravani, Mohammad Hedayati, John Criswell, and Michael L. Scott. TR 1007, Computer Science Dept., Univ. of Rochester, Mar. 2019. Also arXiv:1903.04654 [cs.CR], Mar. 2019. Abstract presented at the Third Great Lakes Security Day (GLSD), Buffalo, NY, Sep. 2019.

“Leveraging Hardware TM in Haskell,” by R. Yates and M. L. Scott. 24th ACM Symposium on Principles and Practice of Parallel Programming (PPoPP), Washington, DC, Feb. 2019.

2018

“iDO: Compiler-Directed Failure Atomicity for Nonvolatile Memory,” by Q. Liu, J. Izraelevitz, S. Lee, M. L. Scott, S. H. Noh, and C. Jung. Fifty-First Intl. Symp. on Microarchitecture (MICRO), Fukuoka, Japan, Oct. 2018. Abstract subsequently presented at the 10th Non-Volatile Memories Workshop (NVMW), San Diego, CA, Mar. 2019.

“Multi-Queue Fair Queueing,” by M. Hedayati, M. L. Scott, K. Shen, and Mike Marty. TR 1005, Computer Science Dept., Univ. of Rochester, Oct. 2018.

“Interval-Based Memory Reclamation,” by H. Wen, J. Izraelevitz, W. Cai, H. A. Beadle, and M. L. Scott. 23rd ACM Symposium on Principles and Practice of Parallel Programming (PPoPP), Vienna, Austria, Feb. 2018.

Concurrency Implications of Nonvolatile Byte-Addressable Memory, by Joseph Izraelevitz. Ph.D. dissertation, Computer Science Department, University of Rochester, 2018.

2017

“Dalí: A Periodically Persistent Hash Map,” by F. Nawab, J. Izraelevitz, T. Kelly, C. B. Morrey III, D. R. Chakrabarti, and M. L. Scott. 31st Intl. Symp. on Distributed Computing (DISC), Vienna, Austria, Sept. 2017. Abstract subsequently presented at the 2018 9th Non-Volatile Memories Workshop (NVMW), San Diego, CA, Mar. 2018.

“Improving STM Performance with Transactional Structs,” by R. Yates and M. L. Scott. 21st Haskell Symp., Oxford, United Kingdom, Sep. 2017. Earlier version presented at the 28th Symposium on Implementation and Application of Functional Languages (IFL), Leuven, Belgium, Aug.–Sept. 2016.

“Composing Durable Data Structures,” by J. Izraelevitz, Virendra J. Marathe, and M. L. Scott. Poster presentation, 8th Annual Non-Volatile Memories Workshop (NVMW), San Diego, CA, Mar. 2017.

“Performance Improvement via Always-abort HTM,” by J. Izraelevitz, L. Xiang, and M. L. Scott. 26th Intl. Conf. on Parallel Architectures and Compilation Techniques (PACT), Portland, OR, Sep. 2017. Earlier version presented at the 12th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Austin, TX, Feb. 2017.

“Generality and Speed in Nonblocking Dual Containers,” by J. Izraelevitz and M. L. Scott. ACM Transactions on Parallel Computing, Mar. 2017.

2016

“Linearizability of Persistent Memory Objects under a Full-System-Crash Failure Model,” by J. Izraelevitz, H. Mendes, and M. L. Scott. 30th Intl. Symp. on Distributed Computing (DISC), Paris, France, Sept. 2016. Extended version available as TR 999, Computer Science Dept., Univ. of Rochester, July 2016.

“An Unbounded Nonblocking Double-ended Queue,” by M. Graichen, J. Izraelevitz, and M. L. Scott. 45th Intl. Conf. on Parallel Processing (ICPP), Philadelphia, PA, Aug. 2016.

“Preserving Happens-before in Persistent Memory,” by J. Izraelevitz, H. Mendes, and M. L. Scott. Brief announcement, 28th ACM Symp. on Parallelism in Algorithms and Architectures (SPAA), Asilomar State Beach, CA, July 2016.

“Failure-Atomic Persistent Memory Updates via JUSTDO Logging,” by J. Izraelevitz, T. Kelly, and A. Kolli. 21st Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Atlanta, GA, Apr. 2016.

“Implicit Acceleration of Critical Sections via Unsuccessful Speculation,” by J. Izraelevitz, Y. Lev, and A. Kogan. 11th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Barcelona, Spain, Mar. 2016.

2015

“Transactional Memory Support for C,” by Hans Boehm, Justin Gottschlich, Victor Luchangco, Paul McKenney, Maged Michael, Mark Moir, Torvald Riegel, Michael Scott, Tatiana Shpeisman, and Michael Spear. Document N1961, Programming Language C, SG5, International Organization for Standardization, Sep. 2015.

“Compiler Assisted Speculation for Multithreaded Systems,” by Lingxiang Xiang. Ph.D. dissertation, Computer Science Department, University of Rochester, 2015.

“An Update on Haskell H/STM,” by R. Yates and M. L. Scott. 10th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Portland, OR, June 2015.

“Conflict Reduction in Hardware Transactions Using Advisory Locks,” by L. Xiang and M. L. Scott. 27th ACM Symp. on Parallelism in Algorithms and Architectures (SPAA), Portland, OR, June 2015.

“Transactional Memory Today,” by M. L. Scott. ACM SIGACT News and Bulletin of the European Association for Theoretical Computer Science, June 2015. Based on remarks delivered at the Maurice Herlihy 60th Birthday Celebration, 33rd ACM Symp. on Principles of Distributed Computing (PODC), Paris, France, July 2014.

“Concurrent Computing in the Many-core Era (Dagstuhl Seminar 15021),” edited by M. Philippsen, P. Felber, M. L. Scott, and J. Eliot B. Moss. Dagstuhl Reports 5:1, Schloss Dagstuhl—Leibniz-Zentrum fuer Informatik, Dagstuhl, Germany, 2015.

“Designing for the Simple Case in a Parallel Scripting Language,” by Li Lu. Ph.D. dissertation, Computer Science Department, University of Rochester, 2015.

“Software Partitioning of Hardware Transactions,” by L. Xiang and M. L. Scott. 20th ACM Symposium on Principles and Practice of Parallel Programming (PPoPP), San Francisco, CA, Feb. 2015. Earlier but expanded version published as TR 993, Computer Science Dept., Univ. of Rochester, Aug. 2014.

2014

“SG5 Transactional Memory Support for C++,” by Michael Wong, Victor Luchangco, Hans Boehm, Justin Gottschlich, Jens Maurer, Paul McKenney, Maged Michael, Mark Moir, Torvald Riegel, Michael Scott, Tatiana Shpeisman, and Michael Spear. Document N4180, Programming Language C++, Evolution Working Group, International Organization for Standardization, Oct. 2014. Previous drafts (with variations on the author list): N3999 (May 2014), N3919 (Feb. 2014), N3859 (Jan. 2014), and N3718 (Aug. 2013).

“Transactional Semantics with Zombies,” by M. L. Scott. Invited presentation, 6th Workshop on the Theory of Transactional Memory (WTTM), Paris, France, July 2014.

“A Generic Construction for Nonblocking Dual Containers,” by J. Izraelevitz and M. L. Scott. Brief announcement, 33rd ACM Symp. on Principles of Distributed Computing (PODC), Paris, France, July 2014. Extended version published as TR 992, Computer Science Dept., Univ. of Rochester, May 2014.

“Preserving the Appeal of Transactional Programming,” by Luke Dalessandro. Ph.D. dissertation, Computer Science Department, University of Rochester, 2014.

“Mechanism to Support Flexible Decoupled Transactional Memory,” by A. Shriraman, S. Dwarkadas, and M. L. Scott. US patent #8,661,204, Feb. 2014.

“Fast Dual Ring Queues,” by J. Izraelevitz and M. L. Scott. Brief announcement, 26th ACM Symp. on Parallelism in Algorithms and Architectures (SPAA), Prague, Czech Republic, June 2014. Extended version published as TR 990, Computer Science Dept., Univ. of Rochester, Jan. 2014.

“Dynamic Enforcement of Determinism in a Parallel Scripting Language,” by L. Lu, W. Ji, and M. L. Scott. 35th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Edinburgh, Scotland, June 2014.

“A Hybrid TM for Haskell,” by R. Yates and M. L. Scott. 9th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Salt Lake City, UT, Mar. 2014.

2013

“Composable Partitioned Transactions,” by L. Xiang and M. L. Scott. 5th Workshop on the Theory of Transactional Memory (WTTM), Jerusalem, Israel, Oct. 2013 (in conjunction with DISC 2013).

“Generic Multiversion STM,” by L. Lu and M. L. Scott. 27th Intl. Symp. on Distributed Computing (DISC), Jerusalem, Israel, Oct. 2013.

“TARDIS: Task-level Access Race Detection by Intersecting Sets,” by W. Ji, L. Lu, and M. L. Scott. 4th Workshop on Determinism and Correctness in Parallel Programming (WoDet), Houston, TX, Mar. 2013 (in conjunction with ASPLOS XVIII).

Shared-Memory Synchronization, by M. L. Scott. Morgan & Claypool Publishers, June 2013.

“Compiler Aided Manual Speculation for High Performance Concurrent Data Structures,” by L. Xiang and M. L. Scott. 18th ACM Symposium on Principles and Practice of Parallel Programming (PPoPP), Shenzhen, China, Feb. 2013.

2012

“Sandboxing Transactional Memory,” by L. Dalessandro and M. L. Scott. 21st Intl. Conf. on Parallel Architectures and Compilation Techniques (PACT), Minneapolis, MN, Sep. 2012. Earlier version presented at the 7th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), New Orleans, LA, Feb. 2012.

“System and Method for Hardware Acceleration of a Software Transactional Memory,” by M. L. Scott, S. Dwarkadas, A. Shriraman, V. Marathe, and M. F. Spear. US patent #8,180,971, May 2012.

“MSpec: A Design Pattern for Concurrent Data Structures,” by L. Xiang and M. L. Scott. 7th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), New Orleans, LA, Feb. 2012.

“Unmanaged Multiversion STM,” by L. Li and M. L. Scott. 7th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), New Orleans, LA, Feb. 2012.

2011

“Toward a Formal Semantic Framework for Deterministic Parallel Programming,” by M. L. Scott and L. Lu. 25th Intl. Symp. on Distributed Computing (DISC), Rome, Italy, Sep. 2011. Earlier version presented at the 2nd Wkshp. on Determinism and Correctness in Parallel Programming (WoDet), Newport Beach, CA, Mar. 2011 (in conjunction with ASPLOS XVI).

“Interchangeable Back Ends for STM Compilers,” by G. Kestor, L. Dalessandro, A. Cristal, M. L. Scott, and O. Unsal. 6th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), San Jose, CA, June. 2011.

“Synchronization,” by M. L. Scott. in Encyclopedia of Parallel Computing, D. Padua, editor. Springer Science+Business Media, 2011.

“Hybrid NOrec: A Case Study in the Effectiveness of Best Effort Hardware Transactional Memory,” by L. Dalessandro, F. Carouge, S. White, Y. Lev, M. Moir, M. L. Scott, and M. F. Spear. 16th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Newport Beach, CA, Mar. 2011.

2010

“Implementation Tradeoffs in the Design of Flexible Transactional Memory Support,” by A. Shriraman, S. Dwarkadas, and M. L. Scott. J. of Parallel and Distributed Computing, Oct. 2010.

“On the Orthogonality of Speculation and Atomicity,” by M. L. Scott and L. Dalessandro. 2nd Wkshp. on the Theory of Transactional Memory (WTTM), Cambridge, MA, Sep. 2010. In conjunction with DISC 2010.

“Transactions as the Foundation of a Memory Consistency Model,” by L. Dalessandro, M. L. Scott, and M. F. Spear. 24th Intl. Symp. on Distributed Computing (DISC), Cambridge, MA, Sep. 2010. Expanded version published as TR 959, Computer Science Dept., Univ. of Rochester, July 2010.

“Transactional Mutex Locks,” by L. Dalessandro, Dave Dice, M. L. Scott, Nir Shavit, and M. F. Spear. Euro-Par 2010, Ischia-Naples, Italy, Aug.–Sep. 2010. Earlier version, by M. F. Spear, A. Shriraman, L. Dalessandro, and M. L. Scott, presented at the 4th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.

“Hybrid TM Using NOrec STM,” by L. Dalessandro, M. F. Spear, and M. L. Scott. Poster presentation, 15th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Pittsburgh, PA, Mar. 2010.

“NOrec: Streamlining STM by Abolishing Ownership Records,” by L. Dalessandro, M. F. Spear, and M. L. Scott. 15th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), Bangalore, India, Jan. 2010.

2009

“Making the Simple Case Simple,” by M. L. Scott. Position paper, Wkshp. on Curricula for Concurrency, Orlando, FL, Oct. 2009. In conjunction with OOPSLA 2009.

“Fastpath Speculative Parallelization,” by M. F. Spear, K. Kelsey, T. Bai, L. Dalessandro, M. L. Scott, C. Ding, and P. Wu. 22nd Intl. Wkshp. on Languages and Compilers for Parallel Computing (LCPC), Newark, DE, Oct. 2009.

“Fast Software Transactions,” by Michael F. Spear. Ph.D. dissertation, Computer Science Department, University of Rochester, 2009.

“Scalable Synchronous Queues,” by W. N. Scherer III, D. Lea, and M. L. Scott. Communications of the ACM, May 2009. Earlier version published in the 11th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), New York, NY, Mar. 2006. Winner, Best Student Paper award.

“Tapping into Parallelism with Transactional Memory,” by A. Shriraman, S. Dwarkadas, and M. L. Scott. ;login: (the USENIX Magazine), Apr. 2009.

“Reducing Memory Ordering Overheads in Software Transactional Memory,” by M. F. Spear, M. M. Michael, M. L. Scott, and P. Wu. 2009 Intl. Symp. on Code Generation and Optimization (CGO), Seattle, WA, Mar. 2009.

“A Comprehensive Contention Management Strategy for Software Transactional Memory,” by M. F. Spear, L. Dalessandro, V. J. Marathe, and M. L. Scott. 14th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), Raleigh, NC, Feb. 2009.

“Strong Isolation is a Weak Idea,” by L. Dalessandro and M. L. Scott. 4th ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.

2008

“Enhancing the Performance and Usability of Software Transactional Memory,” by Virendra J. Marathe. Ph.D. dissertation, Computer Science Department, University of Rochester, 2008.

“Ordering-Based Semantics for Software Transactional Memory,” by M. F. Spear, L. Dalessandro, V. J. Marathe, and M. L. Scott. 12th Intl. Conf. on Principles of Distributed Systems (OPODIS), Luxor, Egypt, Dec. 2008. Earlier version published as TR 938, Computer Science Dept., Univ. of Rochester, Aug. 2008.

“Scalable Techniques for Transparent Privatization in Software Transactional Memory,” by V. J. Marathe, M. F. Spear, and M. L. Scott. 37th Intl. Conf. on Parallel Processing (ICPP), Portland, OR, Sep. 2008.

“Implementing and Exploiting Inevitability in Software Transactional Memory,” by M. F. Spear, M. Silverman, L. Dalessandro, M. M. Michael, and M. L. Scott. 37th Intl. Conf. on Parallel Processing (ICPP), Portland, OR, Sep. 2008.

“Transactional Memory Retry Mechanisms,” by M. F. Spear, A. Sveikauskas, and M. L. Scott. Brief announcement, 27th ACM Symp. on Principles of Distributed Computing (PODC), Toronto, ON, Canada, Aug. 2008. Expanded version published as TR 935, Computer Science Dept., Univ. of Rochester, Nov. 2007.

“Flexible Decoupled Transactional Memory Support,” by A. Shriraman, S. Dwarkadas, and M. L. Scott. 35th Intl. Symp. on Computer Architecture (ISCA), Beijing, China, June 2008. Earlier but expanded version published as TR 925, Computer Science Dept., Univ. of Rochester, Nov. 2007.

“DIMM: Architecture Support for Data Isolation and Memory Monitoring,” by A. Shriraman, S. Dwarkadas, and M. L. Scott. Poster presentation, 13th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Seattle, WA, Apr. 2008.

“RingSTM: Scalable Transactions with a Single Atomic Instruction,” by M. F. Spear, M. M. Michael, and C. von Praun. 20th ACM Symposium on Parallelism in Algorithms and Architectures, Munich, Germany, June 2008. Earlier but expanded version published as Research Report RC24499, IBM T. J. Watson Research Center, Feb. 2008.

“Inevitability Mechanisms for Software Transactional Memory,” by M. F. Spear, M. M. Michael, and M. L. Scott. 3rd ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Salt Lake City, UT, Feb. 2008.

2007

“Toward High Performance Nonblocking Software Transactional Memory,” by V. J. Marathe and Mark Moir. 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), Salt Lake City, Utah, Feb. 2008. Extended version published as “Efficient Nonblocking Software Transactional Memory,” TR 932, Computer Science Dept., Univ. of Rochester, Mar. 2008.

“Transaction Safe Nonblocking Data Structures,” by V. J. Marathe, M. F. Spear, and M. L. Scott. Brief announcement, 21st Intl. Symp. on Distributed Computing (DISC), Lemesos, Cyprus, Sep. 2007. Full version published as TR 924, Computer Science Dept., Univ. of Rochester, Sep. 2007.

“Delaunay Triangulation with Transactions and Barriers,” by M. L. Scott, M. F. Spear, L. Dalessandro, and V. J. Marathe. Benchmarks track, IEEE Intl. Symp. on Workload Characterization (IISWC), Boston, MA, Sep. 2007.

“Capabilities and Limitations of Library-Based Software Transactional Memory in C++,” by L. Dalessandro, V. J. Marathe, M. F. Spear, and M. L. Scott. 2nd ACM SIGPLAN Wkshp. on Transactional Computing (TRANSACT), Portland, OR, Aug. 2007.

“Privatization Techniques for Software Transactional Memory,” by M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Brief announcement, 26th ACM Symp. on Principles of Distributed Computing (PODC), Portland, OR, Aug. 2007. Extended version published as TR 915, Computer Science Dept., Univ. of Rochester, Feb. 2007.

“Transactions and Privatization in Delaunay Triangulation,” by M. L. Scott, M. F. Spear, L. Dalessandro, and V. J. Marathe. Brief announcement, 26th ACM Symp. on Principles of Distributed Computing (PODC), Portland, OR, Aug. 2007.

“An Integrated Hardware-Software Approach to Flexible Transactional Memory,” by A. Shriraman, M. F. Spear, H. Hossain, V. J. Marathe, S. Dwarkadas, and M. L. Scott. 34th Intl. Symp. on Computer Architecture (ISCA), San Diego, CA, June 2007. Earlier but expanded version published as TR 910, Computer Science Dept., Univ. of Rochester, Dec. 2006.

“Nonblocking Transactions Without Indirection Using Alert-on-Update,” by M. F. Spear, A. Shriraman, L. Dalessandro, S. Dwarkadas, and M. L. Scott. 19th ACM Symp. on Parallelism in Algorithms and Architectures (SPAA), San Diego, CA, June 2007.

“Alert-on-Update: A Communication Aid for Shared Memory Multiprocessors,” by M. F. Spear, A. Shriraman, H. Hossain, S. Dwarkadas, and M. L. Scott. Poster presentation, 12th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), San Jose, CA, Mar. 2007.

“An Efficient Nonblocking Copyback Mechanism in Hybrid Transactional Memory,” by V. Marathe and M. Moir. Poster presentation, 12th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), San Jose, CA, Mar. 2007.

“Featherweight Transactions: Decoupling Threads and Atomic Blocks,” by V. Marathe, T. Harris, and J. Larus. Poster presentation, 12th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), San Jose, CA, Mar. 2007.

“A Key-Based Adaptive Transactional Memory Executor,” by T. Bai, X. Shen, C. Zhang, W. N. Scherer III, C. Ding, and M. L. Scott. NSF Next Generation Software Program Wkshp., Long Beach, CA, Mar. 2007. In conjunction with IPDPS 2007. Expanded version published as TR 909, Computer Science Dept., Univ. of Rochester, Dec. 2006.

2006

“Conflict Detection and Validation Strategies for Software Transactional Memory,” by M. F. Spear, V. J. Marathe, W. N. Scherer III, and M. L. Scott. 20th Intl. Symp. on Distributed Computing (DISC), Stockholm, Sweden, Sep. 2006. Also on-line: presentation slides.

“Lowering the Overhead of Nonblocking Software Transactional Memory,” by V. J. Marathe, M. F. Spear, C. Heriot, A. Acharya, D. Eisenstat, W. N. Scherer III, and M. L. Scott. Wkshp. on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with PLDI 2006. Earlier, extended version published as TR 893, Computer Science Dept., Univ. of Rochester, Mar. 2006.

“Hardware Acceleration of Software Transactional Memory,” by A. Shriraman, V. J. Marathe, S. Dwarkadas, M. L. Scott, D. Eisenstat, C. Heriot, W. N. Scherer III, and M. F. Spear. Wkshp. on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with PLDI 2006. Earlier, extended version published as TR 887, Computer Science Dept., Univ. of Rochester, Dec. 2005, revised Mar. 2006.

“Sequential Specification of Transactional Memory Semantics,” by M. L. Scott. Wkshp. on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with PLDI 2006.

“Composite Abortable Locks,” by V. J. Marathe, M. Moir, and N. Shavit. 20th Intl. Parallel and Distributed Processing Symp. (IPDPS), Apr. 2006.

“Synchronization and Concurrency in User-level Software Systems,” by William N. Scherer III. Ph.D. dissertation, Computer Science Department, University of Rochester, 2006.

2005

“A Lazy Concurrent List-Based Set Algorithm,” by S. Heller, M. Herlihy, V. Luchangco, M. Moir, N. Shavit, and W. N Scherer III. 9th Intl. Conf. on Principles of Distributed Systems (OPODIS), Dec. 2005.

“Preemption Adaptivity in Time-Published Queue-Based Spin Locks,” by B. He, W. N. Scherer III, and M. L. Scott. 12th Intl. Conf. on High Performance Computing, Goa, India, Dec. 2005. Winner, Best Paper award. Earlier version published as TR 867, Computer Science Dept., Univ. of Rochester, May 2005.

“A Scalable Elimination-based Exchange Channel,” by W. N. Scherer III, D. Lea, and M. L. Scott. Wkshp. on Synchronization and Concurrency in Object-Oriented Languages (SCOOL), San Diego, CA, Oct. 2005. In conjunction with OOPSLA 2005.

“Transaction Synchronizers,” by V. Luchangco and V. J. Marathe. Wkshp. on Synchronization and Concurrency in Object-Oriented Languages (SCOOL), Oct. 2005. In conjunction with OOPSLA’05.

“Scalable Queue-Based Spin Lock with Timeout,” by M. L. Scott. US patent #6,965,961, Sep. 2005.

“Adaptive Software Transactional Memory,” by V. J. Marathe, W. N. Scherer III, and M. L. Scott. 19th Intl. Symp. on Distributed Computing (DISC), Cracow, Poland, Sep. 2005. Earlier version published as TR 868, Computer Science Dept., Univ. of Rochester, May 2005.

“Advanced Contention Management for Dynamic Software Transactional Memory,” by W. N. Scherer III and M. L. Scott. 24th ACM Symp. on Principles of Distributed Computing (PODC), Las Vegas, NV, July 2005.

“Using LL/SC to Simplify Word-based Software Transactional Memory,” by V. J. Marathe and M. L. Scott. Poster presentation, 24th ACM Symp. on Principles of Distributed Computing (PODC), Las Vegas, NV, July 2005.

“Randomization in STM Contention Management,” by W. N. Scherer III and M. L. Scott. Poster presentation, 24th ACM Symp. on Principles of Distributed Computing (PODC), Las Vegas, NV, July 2005. Winner, Most Popular Poster Presentation award.

2004

“Design Tradeoffs in Modern Software Transactional Memory Systems,” by V. J. Marathe, W. N. Scherer III, and M. L. Scott. 7th Wkshp. on Languages, Compilers, and Run-time Support for Scalable Systems (LCR), Houston, TX, Oct. 2004.

“Nonblocking Concurrent Data Structures with Condition Synchronization,” by W. N. Scherer III and M. L. Scott. 18th Annual Conf. on Distributed Computing (DISC), Amsterdam, The Netherlands, Oct. 2004.

“Contention Management in Dynamic Software Transactional Memory,” by W. N. Scherer III and M. L. Scott. PODC Wkshp. on Concurrency and Synchronization in Java Programs (CSJP), St. John’s, NL, Canada, July 2004. In conjunction with the 23rd ACM Symp. on Principles of Distributed Computing (PODC). Please also download the ERRATA.

“A Qualitative Survey of Modern Software Transactional Memory Systems,” by V. J. Marathe and M. L. Scott. TR 839, Computer Science Dept., Univ. of Rochester, June 2004.

2003

“Software Transactional Memory for Dynamic-Sized Data Structures,” by M. Herlihy, V. Luchangco, M. Moir, and W. N. Scherer III. 22nd ACM Symp. on Principles of Distributed Computing (PODC), July 2003.

“Quickly Reacquirable Locks,” by D. Dice, M. Moir, and W. N. Scherer III. Technical Report, Sun Microsystems Labs, 2003.

2002

“Non-Blocking Timeout in Scalable Queue-Based Spin Locks,” by M. L. Scott. 21st ACM Symp. on Principles of Distributed Computing (PODC), Monterey, CA, July, 2002. Expanded version published as TR 773, Computer Science Dept., Univ. of Rochester, Feb. 2002. Presentation slides.

2001

“Scalable Queue-Based Spin Locks with Timeout,” by M. L. Scott and W. N. Scherer III. 8th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), Snowbird, UT, June 2001.

1998

“Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors,” by M. M. Michael and M. L. Scott. J. of Parallel and Distributed Computing, May 1998.

1997

“Reducing the Overhead of Sharing on Shared Memory Multiprocessors,” by Maged M. Michael. Ph.D. dissertation, Computer Science Department, University of Rochester, 1997.

“Relative Performance of Preemption-Safe Locking and Non-Blocking Synchronization on Multiprogrammed Shared Memory Multiprocessors,” by M. M. Michael and M. L. Scott. Proc. of the 11th Intl. Parallel Processing Symp. (IPPS), Geneva, Switzerland, Apr. 1997. Earlier version published as “Concurrent Update on Multiprogrammed Shared Memory Multiprocessors,” TR 614, Computer Science Dept., Univ. of Rochester, Apr. 1996.

“Scheduler-Conscious Synchronization,” by L. I. Kontothanassis, R. W. Wisniewski, and M. L. Scott. ACM Trans. on Computer Systems, Feb. 1997. Earlier version published as TR 550, Computer Science Dept., Univ. of Rochester, Dec. 1994.

1996

“An Efficient Algorithm for Concurrent Priority Queue Heaps” by G. C. Hunt, M. M. Michael, S. Parthasarathy, and M. L. Scott. Information Processing Letters, Nov. 1996. Earlier version published as TR 560, Computer Science Dept., Univ. of Rochester, Dec. 1994.

“Simple, Fast, and Practical Non-Blocking and Blocking Concurrent Queue Algorithms,” by M. M. Michael and M. L. Scott. 15th ACM Symp. on Principles of Distributed Computing (PODC), Philadelphia, PA, May 1996. Earlier version published as TR 600, Computer Science Dept., Univ. of Rochester, Dec. 1995.

“The Topological Barrier: A Synchronization Abstraction for Regularly-Structured Parallel Applications,” by M. L. Scott and M. M. Michael. TR 605, Computer Science Dept., Univ. of Rochester, Jan. 1996.

1995

“Correction of a Memory Management Method for Lock-Free Data Structures,” by M. M. Michael and M. L. Scott. TR 599, Computer Science Dept., Univ. of Rochester, Dec. 1995.

“High Performance Synchronization Algorithms for Multiprogrammed Multiprocessors,” by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott. 5th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), July 1995.

“Implementation of Atomic Primitives on Distributed Shared-Memory Multiprocessors,” by M. M. Michael and M. L. Scott. 1st Intl. Symp. on High Performance Computer Architecture (HPCA), Raleigh, NC, Jan. 1995. Earlier version published as Scalability of Atomic Primitives on Distributed Shared Memory Multiprocessors,” TR 528, Computer Science Dept., Univ. of Rochester, July 1994.

1994

“Fast, Contention-Free Combining Tree Barriers for Shared-Memory Multiprocessors,” by M. L. Scott and J. M. Mellor-Crummey. Intl. J. of Parallel Programming, Aug. 1994. Previous version published as TR 429, Computer Science Dept., Univ. of Rochester, June 1992.

“Scalable Spin Locks for Multiprogrammed Systems,” by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott. 8th Intl. Parallel Processing Symp., Cancun, Mexico, Apr. 1994. Also TR 454, Computer Science Dept., Univ. of Rochester, Apr. 1993.

1993

“Fast Mutual Exclusion, Even with Contention,” by M. M. Michael and M. L. Scott. TR 460, Computer Science Dept., Univ. of Rochester, June 1993.

“Using Scheduler Information to Achieve Optimal Barrier Synchronization Performance,” by L. I. Kontothanassis and R. W. Wisniewski. 4th ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), May 1993.

“Kernel-Kernel Communication in a Shared-Memory Multiprocessor,” by E. M. Chaves, P. Ch. Das, T. J. LeBlanc, B. D. Marsh, and M. L. Scott. Concurrency—Practice and Experience, May 1993. Also TR 368, Computer Science Dept., Univ. of Rochester, Apr. 1991. Earlier version presented at the 2nd Symp. on Experiences with Distributed and Multiprocessor Systems (SEDMS), Atlanta, GA, Mar. 1991.

1991

“First-Class User-Level Threads,” by B. D. Marsh, M. L. Scott, T. J. LeBlanc, and E. P. Markatos. ACM Symp. on Operating Systems Principles (SOSP), Pacific Grove, CA, Oct. 1991.

“Scalable Reader-Writer Synchronization for Shared-Memory Multiprocessors,” by J. M. Mellor-Crummey and M. L. Scott. 3rd ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), Williamsburg, VA, Apr. 1991.

“Synchronization Without Contention,” by J. M. Mellor-Crummey and M. L. Scott. 4th Intl. Conf. on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Santa Clara, CA, Apr. 1991.

“Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors,” by J. M. Mellor-Crummey and M. L. Scott. ACM Trans. on Computer Systems, Feb. 1991. Winner, 2006 Edsger W. Dijkstra Prize in Distributed Computing. Earlier version published as TR 342, Computer Science Dept., Univ. of Rochester, and COMP TR 90–114, Center for Research on Parallel Computation, Rice Univ., Apr. 1990.

Back to project page
Last Change: 22 October 2024 /