Publications
Michael L. Scott
This is, to the best I’ve been able to reconstruct, a complete
archive of all my papers.
Note that papers appearing in multiple places (e.g., as a TR, then a conference
paper,
then a journal paper) are listed under the most recent year of
appearance.
If you’re looking for something that
doesn’t seem to be here, please let me know.
You can also check my listings at DBLP,
Google Scholar,
and
ORCiD.
–mls
2025
2024
2023
-
“Transactional
Composition of Nonblocking Data Structures,” by
W. Cai, H. Wen, and M. L. Scott.
35th ACM Symposium on Parallelism in
Algorithms and Architectures (SPAA), Orlando, FL, June 2023.
Earlier version available as
arXiv:2301.00996
[cs.DC], Jan. 2023.
Poster
paper / brief announcement presented at the
28th ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), Montréal, PQ, Canada, Feb.–Mar. 2023.
2022
2021
-
“Fast Nonblocking
Persistence for Concurrent Data Structures,” by
W. Cai, H. Wen, V. Maksimovski, M. Du,
R. Sanna, S. Abdallah, and M. L. Scott.
35th Intl. Symp. on
Distributed Computing (DISC), Freiburg, Germany, Oct. 2021.
Extended version available as
arXiv:2105.09508 [cs.DC],
August 2021.
Abstract
presented at the 13th Annual
Non-Volatile Memories Workshop (NVMW), San Diego, CA, May 2022.
-
“Fast
Intra-kernel Isolation and Security with IskiOS,”
by S. Gravani, M. Hedayati, J. Criswell, and M. L.
Scott.
24th Intl. Symp. on Research in
Attacks, Intrusions, and Defenses (RAID), Donostia/San
Sebastian, Spain, Oct. 2021.
Earlier version available as
“IskiOS: Lightweight
Defense Against Kernel-Level Code-Reuse Attacks,”
TR 1007, Computer Science Dept., Univ. of Rochester, Mar. 2019,
and as
arXiv:1903.04654 [cs.CR],
Mar. 2019, updated Nov. 2019 and Dec. 2020.
Abstract
of TR 1007 presented at the
3rd Great Lakes Security Day (GLSD),
Buffalo, NY, Sep. 2019.
-
“Suggested Draft TS for C++ Extensions for Minimal
Transactional Memory,”
by Hans Boehm, Victor Luchangco, Jens Maurer, Michael
L. Scott, Michael Spear, and Michael Wong.
Document number P2066R10, Programming Language C++, SG5, Intl.
Organization for Standardization, Sep. 2021.
Previous drafts: documents
P2066R9, Sep. 2021;
P2066R8, July 2021;
P2066R7, May 2021;
P2066R6, Mar. 2021;
P2066R5, Feb. 2021;
P2066R4, Oct. 2020;
P2066R3, Sep. 2020;
P2066R2, Mar. 2020;
P2066R1, Feb. 2020;
P2066R0, Jan. 2020.
-
“A
Fast, General System for Buffered Persistent Data Structures,” by
H. Wen, W. Cai, M. Du, L. Jenkins, B. Valpey,
and M. L. Scott.
50th Intl. Conf. on
Parallel Processing (ICPP), Aug. 2021.
Also “Building
Fast Recoverable Persistent Data Structures with Montage,”
brief announcement,
34th
Intl. Symp. on Distributed Computing (DISC), Oct. 2020
(without Jenkins as co-author).
Second short version (with Jenkins) presented as
“Building Fast
Recoverable Persistent Data Structures,”
12th Non-Volatile
Memories Workshop (NVMW), Mar. 2021.
Earlier, extended version available as
“Montage: A General
System for Buffered Durably Linearizable Data Structures.”
arXiv:2009.13701 [cs.DC],
Sep. 2020.
-
“Transactional Memory Lite Support in C++,”
by
M. Spear, H. Boehm, V. Luchangco, M. L. Scott, and
M. Wong.
Document number P1875R2, Programming Language C++, SG5, Intl.
Organization for Standardization, Mar. 2021.
Previous drafts: documents
P1875R1,July 2020;
P1875R0, Oct. 2019.
2020
-
“Nonblocking
Persistent Software Transactional Memory,” by
by H. Alan Beadle, Wentao Cai, Haosen Wen,
and Michael L. Scott.
27th Intl. Conf. on High Performance
Computing, Data, and Analytics (HiPC),
Dec. 2020.
Also poster / brief
announcement, 25th
ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), San Diego, CA, Feb. 2020.
Earlier version published as
“Towards Efficient
Nonblocking Persistent Software Transactional Memory,”
TR 1006, Computer Science Dept., Univ. of Rochester, Apr. 2019.
-
“Safe,
Fast Sharing of memcached as a Protected Library,” by
C. Kjellqvist, M. Hedayati, and M. L. Scott.
49th Intl. Conf. on Parallel
Processing (ICPP), Aug. 2020.
-
“Understanding
and Optimizing Persistent Memory Allocation,” by
W. Cai, H. Wen, H. A. Beadle, C. Kjellqvist,
M. Hedayati, and M. L. Scott.
19th
Intl. Symp. on Memory Management (ISMM), June 2020.
Poster / brief
announcement presented at the 25th
ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), San Diego, CA, Feb. 2020.
Expanded version available as
TR 1008,
Computer Science Dept., Univ. of Rochester, March 2020.
Also
arXiv:2003.06718 [cs.DC],
Mar. 2020.
-
“Persistent
Memory Analysis Tool (PMAT),”
by L. Jenkins and M. L. Scott.
Poster presentation,
11th Non-Volatile
Memories Workshop (NVMW), Mar. 2020.
2019
-
“Simplifying
Transactional Memory Support in C++,”
by P. Zardoshti, T. Zhou, P. Balaji, M. L. Scott,
and M. Spear.
ACM Transactions on Architecture and
Code Optimization, Aug. 2019.
Also selected for presentation at the
15th
Intl. Conf. on High Performance Embedded Architecture and Compilers
(HiPEAC), Bologna, Italy, Jan. 2020.
-
“Multi-Queue Fair
Queueing,”
by M. Hedayati, M. L. Scott, K. Shen,
and Mike Marty.
Usenix Annual
Technical Conf., Renton, WA, July 2019.
Preliminary version available as
TR 1005,
Computer Science Dept., Univ. of Rochester, Oct. 2018.
-
“Hodor:
Intra-Process Isolation for High-Throughput Data Plane Libraries,”
by M. Hedayati, S. Gravani, E. Johnson, J. Criswell,
M. L. Scott, K. Shen, and Mike Marty.
Usenix Annual
Technical Conf., Renton, WA, July 2019.
Preliminary version (with a different title) available as
TR 1004,
Computer Science Dept., Univ. of Rochester, Aug. 2018.
-
“Leveraging
Hardware TM in Haskell,”
by R. Yates and M. L. Scott.
24th ACM Symp. on Principles
and Practice of Parallel Programming (PPoPP), Washington, DC,
Feb. 2019.
2018
-
“iDO:
Compiler-Directed Failure Atomicity for Nonvolatile Memory,”
by Q. Liu, J. Izraelevitz, S. Lee, M. L. Scott,
S. H. Noh, and C. Jung.
Fifty-First
Intl. Symp. on
Microarchitecture (MICRO), Fukuoka, Japan, Oct. 2018.
Abstract subsequently
presented at the 10th
Non-Volatile Memories Workshop (NVMW), San Diego, CA,
Mar. 2019.
-
“Interval-Based
Memory Reclamation,” by
H. Wen, J. Izraelevitz, W. Cai, H. A. Beadle, and
M. L. Scott.
23rd ACM Symp. on Principles
and Practice of Parallel Programming (PPoPP), Vienna, Austria,
Feb. 2018.
2017
-
“Dalí:
A Periodically Persistent Hash Map,” by
F. Nawab, J. Izraelevitz, T. Kelly,
C. B. Morrey III, D. R. Chakrabarti, and M. L. Scott.
31st Intl. Symp. on
Distributed Computing (DISC), Vienna, Austria, Sep. 2017.
Abstract subsequently
presented at the 9th
Non-Volatile Memories Workshop (NVMW), San Diego, CA,
Mar. 2018.
-
“Improving STM
Performance with Transactional Structs,” by
R. Yates and M. L. Scott.
21st
Haskell Symp., Oxford, United Kingdom, Sep. 2017.
Earlier version
presented at the
28th Symp. on
Implementation and Application of Functional Languages (IFL),
Leuven, Belgium, Aug.–Sep. 2016.
-
“Performance
Improvement via Always-abort HTM,” by
J. Izraelevitz, L. Xiang, and M. L. Scott.
26th Intl. Conf. on
Parallel Architectures and Compilation Techniques (PACT),
Portland, OR, Sep. 2017.
Earlier version
presented at the
12th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), Austin, TX, Feb. 2017.
-
“Composing Durable Data Structures,”
by J. Izraelevitz, Virendra J. Marathe, and M. L. Scott.
Poster presentation,
8th Non-Volatile
Memories Workshop (NVMW), San Diego, CA, Mar. 2017.
-
“Generality
and Speed in Nonblocking Dual Containers,”
by J. Izraelevitz and M. L. Scott.
ACM Transactions on Parallel
Computing, Mar. 2017.
2016
-
“Linearizability of
Persistent Memory Objects under a Full-System-Crash Failure
Model,”
by J. Izraelevitz, H. Mendes, and M. L. Scott.
30th Intl. Symp. on
Distributed Computing (DISC), Paris, France, Sep. 2016.
Extended version available as
TR 999, Computer
Science Dept., Univ. of Rochester, July 2016.
-
“An Unbounded
Nonblocking Double-ended Queue,”
by M. Graichen, J. Izraelevitz, and M. L. Scott.
45th Intl. Conf. on Parallel
Processing (ICPP), Philadelphia, PA, Aug. 2016.
-
“Preserving
Happens-before in Persistent Memory,”
by J. Izraelevitz, H. Mendes, and M. L. Scott.
Brief announcement, 28th ACM Symp. on
Parallelism in Algorithms and Architectures (SPAA), Asilomar
State Beach, CA, July 2016.
2015
-
Programming Language
Pragmatics, 4th edition, by
M. L. Scott.
Morgan Kaufmann Publishers, Dec. 2015 (© 2016).
-
“Transactional Memory Support for C,” by
Hans Boehm, Justin Gottschlich, Victor Luchangco, Paul McKenney, Maged
Michael, Mark Moir, Torvald Riegel, Michael Scott, Tatiana Shpeisman,
and Michael Spear.
Document N1961, Programming Language C, SG5, Intl.
Organization for Standardization, Sep. 2015.
-
“Using Hardware Transactions in the GHC Run-time
System'' (abstract only), by
R. Yates and M. L. Scott. Haskell
Implementers Workshop, Vancouver, BC, Canada, Aug. 2015.
In conjunction with the 2015 Haskell
Symp. and the Intl. Conf.
on Functional Programming.
-
“An
Update on Haskell H/STM,” by
R. Yates and M. L. Scott.
10th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), Portland, OR, June 2015.
-
“Conflict
Reduction in Hardware Transactions Using Advisory Locks,”
by L. Xiang and M. L. Scott.
27th ACM
Symp. on Parallelism in Algorithms and Architectures (SPAA),
Portland, OR, June 2015.
-
“Transactional
Memory Today,”
by M. L. Scott.
ACM SIGACT
News and
Bulletin of
the European Association for Theoretical Computer Science,
June 2015.
Based on remarks delivered at the
Maurice
Herlihy 60th Birthday Celebration,
33rd ACM Symp. on Principles of Distributed Computing (PODC),
Paris, France, July 2014.
-
“Concurrent
Computing in the Many-core Era (Dagstuhl
Seminar 15021),”
edited by M. Philippsen, P. Felber, M. L. Scott, and
J. Eliot B. Moss.
Dagstuhl Reports 5:1, Schloss Dagstuhl—Leibniz-Zentrum fuer
Informatik, Dagstuhl, Germany, 2015.
-
“Software
Partitioning of Hardware Transactions,”
by L. Xiang and M. L. Scott.
20th ACM Symp. on Principles
and Practice of Parallel Programming (PPoPP), San Francisco, CA,
Feb. 2015.
Earlier but expanded version published as
TR 993, Computer
Science Dept., Univ. of Rochester, Aug. 2014.
2014
-
“SG5 Transactional Memory Support for C++,” by
M. Wong, V. Luchangco,
H. Boehm, J. Gottschlich, J. Maurer, P. McKenney,
M. Michael, M. Moir, T. Riegel, M. Scott,
T. Shpeisman, and M. Spear.
Document N4180, Programming Language C++, Evolution Working
Group, Intl. Organization for Standardization, Oct. 2014.
Previous drafts (with variations on the author list):
N3999 (May 2014),
N3919 (Feb. 2014),
N3859 (Jan. 2014),
and
N3718 (Aug. 2013).
-
“Transactional
Semantics with Zombies,”
by M. L. Scott. Invited presentation,
6th
Workshop on the Theory of
Transactional Memory (WTTM), Paris, France, July 2014.
-
“A
Generic Construction for Nonblocking Dual Containers,”
by J. Izraelevitz and M. L. Scott.
Brief announcement, 33rd ACM
Symp. on Principles of Distributed Computing (PODC), Paris,
France, July 2014.
Extended version published as
TR 992,
Computer Science Dept., Univ. of Rochester,
May 2014.
-
“Mechanism
to Support Flexible Decoupled Transactional
Memory,” by
A. Shriraman, S. Dwarkadas, and M. L. Scott.
US patent #8,661,204, Feb. 2014.
-
“Fast
Dual Ring Queues,”
by J. Izraelevitz and M. L. Scott.
Brief announcement,
26th ACM
Symp. on Parallelism in Algorithms and Architectures (SPAA),
Prague, Czech Republic, June 2014.
Extended version published as
TR 990, Computer
Science Dept., Univ. of Rochester,
Jan. 2014.
-
“Dynamic Enforcement
of Determinism in a Parallel Scripting Language,”
by L. Lu, W. Ji, and M. L. Scott.
35th ACM SIGPLAN
Conf. on Programming Language Design and Implementation
(PLDI), Edinburgh, Scotland, June 2014.
-
“A
Hybrid TM for Haskell,” by R. Yates and
M. L. Scott.
9th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), Salt Lake City, UT, Mar. 2014.
-
“Disengaged
Scheduling for Fair, Protected Access to Fast Computational
Accelerators,”
by K. Menychtas, K. Shen, and M. L. Scott.
19th Intl. Conf. on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS), Salt Lake City, UT, Mar. 2014.
2013
-
“CSC 2/454: Programming Language Design and Implementation,
University of Rochester,”
by M. L. Scott.
Course exemplar, pp. 369–371,
Computer
Science Curricula
2013: Curriculum Guidelines for Undergraduate Degree Programs in
Computer Science, Joint Task Force on Computing Curricula,
Association for Computing Machinery (ACM) and IEEE Computer Society,
Dec. 2013 .
-
“Composable
Partitioned Transactions,”
by L. Xiang and M. L. Scott.
5th
Workshop on the Theory of Transactional Memory
(WTTM), Jerusalem, Israel, Oct. 2013. In conjunction with
DISC
2013.
-
“Generic Multiversion
STM,” by L. Lu and M. L. Scott.
27th Intl. Symp. on
Distributed Computing (DISC), Jerusalem, Israel, Oct. 2013.
-
“Enabling
OS Research by Inferring Interactions in the Black-Box GPU
Stack,” by K. Menychtas, K. Shen, and
M. L. Scott.
Usenix Annual
Technical Conf., San Jose, CA, June 2013.
-
“TARDIS:
Task-level Access Race Detection by Intersecting Sets,”
by W. Ji, L. Lu, and M. L. Scott.
4th Workshop on Determinism
and Correctness in Parallel Programming (WoDet),
Houston, TX, Mar. 2013. In conjunction with ASPLOS XVIII.
-
Shared-Memory Synchronization, by
M. L. Scott.
Morgan & Claypool Publishers, June 2013.
-
“Compiler Aided
Manual Speculation for High Performance Concurrent Data
Structures,”
by L. Xiang and M. L. Scott.
18th ACM Symp. on Principles
and Practice of Parallel Programming (PPoPP), Shenzhen, China,
Feb. 2013.
2012
-
“System
and Method for Hardware Acceleration of a
Software Transactional Memory,” by M. L. Scott,
S. Dwarkadas, A. Shriraman, V. Marathe, and
M. F. Spear. US patent #8,180,971, May 2012.
-
“Sandboxing
Transactional Memory,”
by L. Dalessandro and M. L. Scott.
21st Intl. Conf. on
Parallel Architectures and Compilation Techniques (PACT),
Minneapolis, MN, Sep. 2012.
Earlier version
presented at the 7th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), New Orleans, LA, Feb. 2012.
-
“MSpec: A Design
Pattern for Concurrent Data Structures,”
by L. Xiang and M. L. Scott.
7th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), New Orleans, LA, Feb. 2012.
-
“Unmanaged
Multiversion STM,”
by L. Li and M. L. Scott.
7th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), New Orleans, LA, Feb. 2012.
2011
-
“Toward a Formal Semantic
Framework for Deterministic Parallel
Programming,” by M. L. Scott and L. Lu.
25th Intl. Symp. on
Distributed Computing (DISC), Rome, Italy, Sep. 2011.
Earlier version presented at the
2nd Wkshp. on
Determinism and Correctness in Parallel Programming (WoDet), Newport
Beach, CA, Mar. 2011.&bsp; In conjunction with
ASPLOS XVI.
-
“Interchangeable Back
Ends for STM Compilers,” by G. Kestor, L. Dalessandro,
A. Cristal, M. L. Scott, and O. Unsal.
6th ACM
SIGPLAN Wkshp. on Transactional Computing
(TRANSACT), San Jose, CA, June. 2011.
-
“Synchronization,”
by M. L. Scott. in Encyclopedia of Parallel Computing,
D. Padua, editor. Springer Science+Business Media, 2011.
-
“Hybrid
NOrec: A Case Study in the Effectiveness of Best Effort
Hardware Transactional Memory,” by L. Dalessandro,
F. Carouge, S. White, Y. Lev, M. Moir,
M. L. Scott, and M. F. Spear.
16th Intl. Conf. on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS), Newport Beach, CA, Mar. 2011.
2010
-
“Implementation
Tradeoffs in the Design of Flexible Transactional Memory Support,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
J. of Parallel and Distributed Computing, Oct. 2010.
- “In Search of Big
Instructions,” by A. Shriraman, S. Dwarkadas,
and M. L. Scott. Computing Community Consortium
Wkshp. on Advancing Computer Architecture Research (ACAR): What Now in
Instruction-Level Parallelism Research, Seattle, WA, Sep. 2010.
- “On the Orthogonality of
Speculation and Atomicity,” by M. L. Scott and
L. Dalessandro. 2nd
Wkshp. on the Theory of Transactional Memory (WTTM), Cambridge, MA,
Sep. 2010. In conjunction with DISC 2010.
- “Transactions
as the Foundation of a Memory Consistency Model,”
by L. Dalessandro, M. L. Scott, and M. F. Spear.
24th Intl. Symp. on
Distributed Computing (DISC), Cambridge, MA, Sep. 2010.
Expanded version published as
TR 959,
Computer Science Dept., Univ. of Rochester, July 2010.
- “Transactional
Mutex Locks,”
by L. Dalessandro, Dave Dice, M. L. Scott, Nir Shavit, and
M. F. Spear.
Euro-Par 2010,
Ischia-Naples, Italy, Aug.–Sep. 2010.
Earlier version, by
M. F. Spear, A. Shriraman, L. Dalessandro, and
M. L. Scott, presented at the
4th ACM SIGPLAN Wkshp.
on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.
-
“Hybrid
TM Using NOrec STM,” by L. Dalessandro, M. F. Spear,
and M. L. Scott.
Poster presentation,
15th
Intl. Conf. on Architectural Support for Programming Languages and
Operating Systems (ASPLOS), Pittsburgh, PA, Mar. 2010.
-
“NOrec: Streamlining
STM by Abolishing Ownership Records,” by
L. Dalessandro, M. F. Spear, and M. L. Scott.
15th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP),
Bangalore, India, Jan. 2010.
2009
-
“Making the Simple
Case Simple,” by M. L. Scott. Position paper,
Wkshp.
on Curricula for Concurrency, Orlando, FL, Oct. 2009.
In conjunction with
OOPSLA 2009.
-
“Fastpath
Speculative Parallelization,” by
M. F. Spear, K. Kelsey, T. Bai, L. Dalessandro,
M. L. Scott, C. Ding, and P. Wu.
22nd Intl. Wkshp. on
Languages and Compilers for Parallel Computing (LCPC), Newark, DE,
Oct. 2009.
-
“Scalable
Synchronous Queues,” by
W. N. Scherer III, D. Lea, and M. L. Scott.
Communications of the ACM,
May 2009.
Earlier version
published in the
11th ACM Symp. on Principles and
Practice of Parallel Programming (PPoPP), New York, NY,
Mar. 2006. Winner, Best Student Paper award.
- “Tapping into
Parallelism with Transactional Memory,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
;login: (the
Usenix Magazine), Apr. 2009.
-
Programming Language
Pragmatics, 3rd edition, by
M. L. Scott.
Morgan Kaufmann Publishers, Mar. 2009.
- “Reducing Memory
Ordering Overheads in Software Transactional Memory,”
by M. F. Spear, M. M. Michael, M. L. Scott, and
P. Wu.
2009 Intl. Symp. on Code
Generation and Optimization (CGO), Seattle, WA, Mar. 2009.
- “A Comprehensive
Contention Management Strategy for Software Transactional Memory,”
by M. F. Spear, L. Dalessandro, V. J. Marathe, and
M. L. Scott.
14th ACM Symp. on Principles and
Practice of Parallel Programming (PPoPP), Raleigh, NC, Feb. 2009.
- “Strong Isolation
is a Weak Idea,”
by L. Dalessandro and M. L. Scott.
4th ACM SIGPLAN Wkshp.
on Transactional Computing (TRANSACT), Raleigh, NC, Feb. 2009.
2008
- “Ordering-Based
Semantics for Software Transactional Memory,”
by M. F. Spear, L. Dalessandro, V. J. Marathe, and
M. L. Scott.
12th Intl. Conf. on Principles of
Distributed Systems (OPODIS), Luxor, Egypt, Dec. 2008.
Earlier version published as
TR 938,
Computer Science Dept., Univ. of Rochester, Aug. 2008.
- “Scalable Techniques
for Transparent Privatization in Software Transactional Memory,”
by V. J. Marathe, M. F. Spear, and M. L. Scott.
37th Intl. Conf. on
Parallel Processing (ICPP), Portland, OR, Sep. 2008.
- “Implementing and
Exploiting Inevitability in Software Transactional Memory,”
by M. F. Spear, M. Silverman, L. Dalessandro,
M. M. Michael, and M. L. Scott.
37th Intl. Conf. on
Parallel Processing (ICPP), Portland, OR, Sep. 2008.
- “Transactional
Memory Retry Mechanisms,”
by M. F. Spear, A. Sveikauskas, and M. L. Scott.
Brief announcement, 27th ACM
Symp. on Principles of Distributed Computing (PODC), Toronto,
ON, Canada, Aug. 2008.
Expanded version published as
TR 935, Computer
Science Dept., Univ. of Rochester, Nov. 2007.
- “Flexible
Decoupled Transactional Memory Support,”
by A. Shriraman,
S. Dwarkadas, and M. L. Scott.
35th Intl. Symp. on
Computer Architecture (ISCA), Beijing, China, June 2008.
Earlier but expanded version published as
TR 925, Computer
Science Dept., Univ. of Rochester, Nov. 2007.
- “DIMM:
Architecture Support for Data Isolation and Memory Monitoring,”
by A. Shriraman, S. Dwarkadas, and M. L. Scott.
Poster presentation,
13th Intl. Conf. on
Architectural Support for Programming Languages and Operating
Systems (ASPLOS), Seattle, WA, Apr. 2008.
- “Inevitability
Mechanisms for Software Transactional Memory,”
by M. F. Spear, M. M. Michael, and M. L. Scott.
3rd ACM SIGPLAN Wkshp. on
Transactional Computing (TRANSACT), Salt Lake City, UT,
Feb. 2008.
2007
-
“Transaction Safe
Nonblocking Data Structures,”
by V. J. Marathe, M. F. Spear, and
M. L. Scott.
Brief announcement,
21st Intl. Symp. on
Distributed Computing (DISC), Lemesos, Cyprus, Sep. 2007.
Full version published as
TR 924, Computer
Science Dept., Univ. of Rochester, Sep. 2007.
-
“Delaunay
Triangulation with Transactions and Barriers,”
by M. L. Scott, M. F. Spear, L. Dalessandro, and
V. J. Marathe.
Benchmarks track,
IEEE
Intl. Symp. on Workload Characterization (IISWC),
Boston, MA, Sep. 2007.
-
“Capabilities
and Limitations of Library-Based Software Transactional
Memory in C++,”
by L. Dalessandro, V. J. Marathe, M. F. Spear, and
M. L. Scott.
2nd ACM
SIGPLAN Wkshp. on Transactional Computing (TRANSACT),
Portland, OR, Aug. 2007.
-
“Privatization
Techniques for Software Transactional Memory,”
by M. F. Spear, V. J. Marathe, L. Dalessandro, and
M. L. Scott.
Brief announcement,
26th ACM Symp. on
Principles of Distributed Computing (PODC), Portland, OR,
Aug. 2007.
Extended version published as
TR 915, Computer
Science Dept., Univ. of Rochester, Feb. 2007.
-
“Transactions and
Privatization in Delaunay Triangulation,”
by M. L. Scott, M. F. Spear, L. Dalessandro, and
V. J. Marathe.
Brief announcement,
26th ACM Symp. on
Principles of Distributed Computing (PODC), Portland, OR, Aug. 2007.
-
“Analysis of
Input-Dependent Program Behavior Using Active Profiling,”
by X. Shen, C. Zhang, C. Ding, M. L. Scott,
S. Dwarkadas, and M. Ogihara.
Wkshp. on
Experimental Computer Science,
San Diego, CA, June 2007. Earlier version published as
“Characterizing
Phases in Service-Oriented Appliations,” by
X. Shen,
C. Ding,
S. Dwarkadas, and
M. L. Scott.
TR 848, Computer Science Dept., Univ. of Rochester, Nov. 2004.
-
“An Integrated
Hardware-Software Approach to Flexible Transactional Memory,”
by A. Shriraman, M. F. Spear, H. Hossain,
V. J. Marathe, S. Dwarkadas, and M. L. Scott.
34th Intl. Symp. on
Computer Architecture (ISCA), San Diego,
CA, June 2007.
Earlier but expanded version published as
TR 910, Computer
Science Dept., Univ. of Rochester, Dec. 2006.
-
“Nonblocking
Transactions Without Indirection Using Alert-on-Update,”
by M. F. Spear, A. Shriraman, L. Dalessandro,
S. Dwarkadas, and M. L. Scott.
19th ACM Symp. on
Parallelism in Algorithms and Architectures (SPAA), San Diego,
CA, June 2007.
-
“Alert-on-Update:
A Communication Aid for Shared Memory Multiprocessors,”
by M. F. Spear, A. Shriraman, H. Hossain, S. Dwarkadas,
and M. L. Scott.
Poster presentation,
12th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP), San Jose,
CA, Mar. 2007.
-
“A Key-Based Adaptive
Transactional Memory Executor,”
by T. Bai, X. Shen, C. Zhang, W. N. Scherer III,
C. Ding, and M. L. Scott.
NSF
Next Generation Software Program Wkshp., Long Beach, CA,
Mar. 2007.
In conjunction with
IPDPS 2007.
Expanded version published as
TR 909,
Computer Science Dept., Univ. of Rochester, Dec. 2006.
2006
-
“Conflict
Detection and Validation Strategies for Software
Transactional Memory,”
by M. F. Spear, V. J. Marathe, W. N. Scherer III,
and M. L. Scott.
20th Intl. Symp. on
Distributed Computing (DISC), Stockholm, Sweden, Sep. 2006.
Also on-line:
presentation slides.
-
“Multiple
Clock Domain Microprocessor,”
by D. Albonesi,
G. P. Semeraro, G. Magklis, M. L. Scott,
R. Balasubramonian, and S. Dwarkadas. US patent #7,089,443,
Aug. 2006.
-
“Lowering the
Overhead of Nonblocking Software Transactional Memory,”
by V. J. Marathe, M. F. Spear, C. Heriot,
A. Acharya, D. Eisenstat, W. N. Scherer III,
and M. L. Scott.
Wkshp. on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI 2006.
Earlier, extended version published as
TR 893,
Computer Science Dept., Univ. of Rochester,
Mar. 2006.
-
“Hardware
Acceleration of Software Transactional Memory,”
by A. Shriraman, V. J. Marathe, S. Dwarkadas,
M. L. Scott, D. Eisenstat, C. Heriot,
W. N. Scherer III, and M. F. Spear.
Wkshp. on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI 2006.
Earlier, extended version published as
TR 887,
Computer Science Dept., Univ. of Rochester, Dec.
2005, revised Mar. 2006.
-
“Sequential
Specification of Transactional Memory Semantics,”
by M. L. Scott.
Wkshp. on
Languages, Compilers, and Hardware Support for Transactional Computing
(TRANSACT), Ottawa, ON, Canada, June 2006. In conjunction with
PLDI 2006.
2005
-
“Teaching
Intellectual Connections,”
by M. L. Scott.
In How
I Teach, Vol. III: Essays on teaching by
winners of the Robert and Pamela Goergen Award for Distinguished
Achievement and Artistry in Undergraduate Teaching. Univ. of
Rochester, 2005.
-
“Preemption
Adaptivity in Time-Published Queue-Based Spin Locks,” by
B. He, W. N. Scherer III, and M. L. Scott.
12th Intl. Conf. on High Performance
Computing, Goa, India, Dec. 2005.
Winner, Best Paper award.
Earlier version published as
TR 867,
Computer Science Dept., Univ. of Rochester, May 2005.
-
Programming Language
Pragmatics, 2nd edition, by
M. L. Scott.
Morgan Kaufmann Publishers, Nov. 2005 (© 2006).
-
“A Scalable
Elimination-based Exchange Channel,” by
W. N. Scherer III, D. Lea, and M. L. Scott.
Wkshp.
on Synchronization and Concurrency in Object-Oriented Languages
(SCOOL), San Diego, CA, Oct. 2005.
In conjunction with OOPSLA 2005.
-
“Scalable
Queue-Based Spin Lock with Timeout,”
by M. L. Scott.
US patent #6,965,961, Sep. 2005.
-
“Adaptive Software
Transactional Memory,” by V. J. Marathe,
W. N. Scherer III, and M. L. Scott.
19th Intl. Symp. on
Distributed Computing (DISC), Cracow, Poland, Sep. 2005.
Earlier version published as
TR 868,
Computer Science Dept., Univ. of Rochester, May 2005.
-
“Shared Memory
Computing on Clusters with Symmetric Multiprocessors and
System Area Networks,” by L. Kontothanassis, R. Stets, G. Hunt,
U. Rencuzogullari, G. Altekar, S. Dwarkadas, and M. L. Scott.
ACM Trans. on Computer Systems,
Aug. 2005.
-
“Advanced Contention
Management for Dynamic Software Transactional
Memory,” by W. N. Scherer III and M. L. Scott.
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005.
-
“Using
LL/SC to Simplify Word-based Software Transactional Memory,”
by V. J. Marathe and M. L. Scott.
Poster presentation,
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005.
-
“Randomization
in STM Contention Management,”
by W. N. Scherer III and M. L. Scott.
Poster presentation,
24th ACM Symp.
on Principles of Distributed Computing (PODC), Las Vegas, NV,
July 2005. Winner, Most Popular Poster Presentation award.
-
“Detecting
Variable-Length Phases in Utility Programs,” by X. Shen,
C. Ding, S. Dwarkadas, and M. L. Scott. Poster presentation,
ACM SIGPLAN 2005 Conf. on Programming Language Design and
Implementation (PLDI), Chicago, IL, June 2005.
-
“The Many
Faces of Systems Research–And How to Evaluate Them,” by
A. B. Brown, A. Chanda, R. Farrow, A. Fedorova, P. Maniatis, and
M. L. Scott.
10th Hot Topics in
Operating Systems Symp. (HotOS), Santa Fe, NM,
June, 2005.
-
“Aggressive
Prefetching: An Idea Whose Time Has Come,” by
A. E. Papathanasiou and M. L. Scott.
10th Hot Topics in
Operating Systems Symp. (HotOS), Santa Fe, NM,
June, 2005.
2004
-
“Dynamically Trading Frequency for
Complexity in a GALS Microprocessor,” by
S. Dropsho, G. Semeraro, D. H. Albonesi, G. Magklis, and M. L. Scott.
37th Intl. Symp. on
Microarchitecture, Portland, OR, Dec. 2004.
-
“Profile-driven
Component Placement for Cluster-based Online Services,” by
C. Stewart, K. Shen, S. Dwarkadas, M. L. Scott, and
J. Yin.
Refereed work-in-progress paper, 5th Intl.
Middleware Conf., Toronto, ON, Canada, Oct. 2004.
-
“Design Tradeoffs in Modern
Software Transactional Memory Systems,” by
V. J. Marathe, W. N. Scherer III, and M. L. Scott.
7th Wkshp. on Languages, Compilers, and Run-time Support
for Scalable Systems (LCR), Houston, TX, Oct. 2004.
-
“Nonblocking Concurrent
Data Structures with Condition Synchronization,” by
W. N. Scherer III and M. L. Scott.
18th Annual Conf. on
Distributed Computing (DISC), Amsterdam, The Netherlands,
Oct. 2004.
-
“The Energy Impact of
Aggressive Loop Fusion,” by Y. Zhu,
G. Magklis, M. L. Scott, C. Ding, and D. H. Albonesi.
13th Symp. on
Parallel Architectures and Compilation Techniques (PACT),
Antibes Juan-les-Pins, France,
Sep.–Oct. 2004. (Online version here corrects accidental
interchange of labels in several places in the results section of the
published paper.)
Earlier version publised as TR 822,
Computer Science Dept., Univ. of Rochester, Dec. 2003.
-
“Contention
Management in Dynamic Software Transactional Memory,” by
W. N. Scherer III and M. L. Scott.
PODC Wkshp. on
Concurrency and Synchronization in Java Programs (CSJP),
St. John’s, NL, Canada, July 2004. In conjunction with the
23rd
ACM Symp. on Principles of Distributed Computing (PODC).
Please also download the
ERRATA.
-
“Energy
Efficient Prefetching and Caching,” by
A. E. Papathanasiou and M. L. Scott.
Usenix Annual
Technical Conf., Boston, MA, June 2004.
Winner, Best Paper award.
-
“A Qualitative Survey of Modern
Software Transactional Memory Systems,”
by V. J. Marathe and M. L. Scott. TR 839, Computer Science
Dept., Univ. of Rochester, June 2004.
-
“Power-efficient
Server-class Performance from Arrays of Laptop Disks,”
by A. E. Papathanasiou and M. L. Scott.
TR 837, Computer Science Dept., Univ. of Rochester, May 2004.
-
“Integrating Remote
Invocation and Distributed Shared State,” by C. Tang,
D. Chen, S. Dwarkadas, and M. L. Scott.
18th Intl. Parallel and Distributed Processing Symp. (IPDPS),
Santa Fe, NM, Apr. 2004.
Expanded version published as TR 830,
Computer Science Dept.,
Univ. of Rochester, Jan. 2004.
-
“Hiding Synchronization Delays in
a GALS Processor Microarchitecture,”
by G. Semeraro, D. H. Albonesi, G. Magklis,
M. L. Scott, S. G. Dropsho,
and S. Dwarkadas.
10th Intl. Symp. on Asynchronous Circuits and Systems (ASYNC),
Heraklion, Crete, Greece, Apr. 2004.
-
“Improving Application Performance
by Dynamically Trading Frequency for Complexity in a GALS
Microprocessor,” by G. Semeraro, D. H. Albonesi,
S. Dropsho, G. Magklis, and M. L. Scott.
TR 832, Computer Science Dept., Univ. of Rochester, Feb. 2004.
-
“Report on SOSP
19,” by M. L. Scott and L. L. Peterson.
ACM Operating Systems Review, Jan. 2004.
2003
-
“Dynamic Frequency and
Voltage Scaling for a Multiple Clock Domain Microprocessor,”
by G. Magklis, G. Semeraro, D. H. Albonesi,
S. Dropsho, S. Dwarkadas, and M. L. Scott.
IEEE Micro, Nov./Dec., 2003.
“Top Picks” award for “the most industry
relevant and significant papers of the year in microarchitecture.”
-
“Dynamically Tuning
Processor Resources with Adaptive Processing,”
by D. H. Albonesi, R. Balasubramonian, S. G. Dropsho,
S. Dwarkadas, E. G. Friedman, M. C. Huang, V. Kursun, G. Magklis,
M. L. Scott, G. Semeraro, P. Bose, A. Buyuktosunoglu, P. W. Cook, and
S. E. Schuster. Computer, Dec. 2003.
-
“Improving Application Performance
by Dynamically Balancing Speed and Complexity in a GALS
Microprocessor,”
by G. Semeraro, D. H. Albonesi, S. Dropsho, G. Magklis, and M. L. Scott.
2nd Wkshp. on Application Specific Processors (WASP),
San Diego, CA, Dec. 2003. In conjunction with MICRO 2003.
-
“Energy Efficiency
through Burstiness,”
by A. E. Papathanasiou and M. L. Scott.
5th IEEE Wkshp. on Mobile
Computing Systems and Applications (WMCSA), Monterey, CA,
Oct. 2003.
-
“Energy
Efficient Prefetching and Caching,”
by A. E. Papathanasiou and M. L. Scott. Poster presentation,
19th ACM
Symp. on Operating Systems Principles (SOSP),
Bolton Landing (Lake George), NY, Oct. 2003.
-
“Profile-based Dynamic Voltage and
Frequency Scaling for a Multiple Clock Domain Microprocessor,”
by G. Magklis, M. L. Scott, G. Semeraro, D. H. Albonesi, and S. Dropsho.
30th
Intl. Symp. on
Computer Architecture (ISCA), San Diego, CA, June 2003.
-
“Exploiting High-Level
Coherence Information to Optimize Distributed Shared State,”
by D. Chen, C. Tang, B. Sanders, S. Dwarkadas, and M. L. Scott.
9th ACM Symp. on
Principles and Practice of Parallel Programming (PPoPP), San Diego, CA,
June 2003.
-
“Distributed Shared State,”
by M. L. Scott, D. Chen, S. Dwarkadas, and C. Tang.
9th Intl. Wkshp. on Future
Trends of Distributed Computing Systems (FTDCS), San Juan, PR,
May 2003.
-
“Efficient Distributed Shared
State for Heterogeneous Machine Architectures,”
by C. Tang, D. Chen, S. Dwarkadas, and M. L. Scott.
Intl. Conf. on Distributed
Computing Systems (ICDCS), Providence, RI, May 2003.
Earlier but expanded version published as
“Support for Machine and Language Heterogeneity in a Distributed Shared
State System,”
TR 783, Computer Science Dept., Univ. of Rochester, June 2002.
2002
-
“Dynamic Frequency and Voltage Control for a Multiple Clock Domain Microarchitecture,”
by G. Semeraro, D. H. Albonesi, S. G. Dropsho, G. Magklis, S. Dwarkadas,
and M. L. Scott.
35th Intl. Symp. on
Microarchitecture, Istanbul, Turkey, Nov. 2002.
-
“Increasing Disk Burstiness for Energy Efficiency,”
by A. E. Papathanasiou and M. L. Scott.
TR 792, Computer Science Dept., Univ. of Rochester, Nov. 2002.
-
“Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power,”
by S. Dropsho, A. Buyuktosunoglu, R. Balasubramonian, D. H. Albonesi, S. Dwarkadas, G. Semeraro, G. Magklis, and M. L. Scott.
11th Intl. Conf. on
Parallel Architectures and Compilation Techniques (PACT),
Charlottesville, VA, Sep. 2002.
-
“JVM
for a Heterogeneous Shared Memory System,”
by D. Chen, C. Tang, S. Dwarkadas, and M. L. Scott.
Wkshp. on Caching, Coherence, and Consistency (WC3’02),
New York, NY, June 2002.
In conjunction with ICS
2002.
-
“Multi-level Shared State for Distributed Systems,”
by D. Chen, C. Tang, X. Chen, S. Dwarkadas, and M. L. Scott.
31st Intl. Conf. on
Parallel Processing (ICPP), Vancouver, BC, Canada, Aug. 2002.
Winner, Best Paper award.
Earlier but expanded version published as
“Beyond S-DSM: Shared State for Distributed Systems,”
TR 744, Computer Science Dept., Univ. of Rochester, Mar. 2001.
-
“Non-Blocking Timeout in Scalable Queue-Based Spin Locks,”
by M. L. Scott.
21st ACM Symp. on Principles
of Distributed Computing (PODC), Monterey, CA, July, 2002.
Expanded version published as
TR 773, Computer Science
Dept., Univ. of Rochester, Feb. 2002.
Presentation slides.
-
“Energy Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling,”
by G. Semeraro, G. Magklis, R. Balasubramonian, D. H. Albonesi, S. Dwarkadas, and M. L. Scott.
8th Intl. Symp. on
High Performance Computer Architecture (HPCA), Cambridge, MA,
Feb. 2002.
-
“Apparatus
and Method for Maintaining Data Coherence
Within a Cluster of Symmetric Multiprocessors,”
by L. Kontothanassis, M. L. Scott,
R. Stets, S. Dwarkadas, N. Hardavellas, and
G. Hunt.
US patent #6,341,339, Jan. 2002.
2001
2000
-
“Is S-DSM
Dead?,” by M. L. Scott. Invited keynote address.
2nd Wkshp. on
Software Distributed Shared Memory, Santa Fe, NM, May 2000.
In conjunction with ICS
2000.
-
“S-DSM
for Heterogeneous Machine Architectures,”
by E. Pinheiro, D. Chen, S. Dwarkadas, S. Parthasarathy, and
M. L. Scott.
2nd Wkshp. on
Software Distributed Shared Memory, Santa Fe,
NM, May 2000.
In conjunction with ICS
2000.
-
“InterWeave:
A Middleware System for Distributed Shared State,”
by D. Chen, S. Dwarkadas, S. Parthasarathy, E. Pinheiro, and
M. L. Scott.
5th Wkshp. on
Languages, Compilers, and Run-time Support for Scalable Systems (LCR),
Rochester, NY, May 2000.
Also on-line:
presentation slides.
-
“The Effect of Network Total Order, Broadcast, and Remote-Write Capability on Network-Based Shared Memory Computing,”
by R. Stets, S. Dwarkadas, L. I. Kontothanassis, U. Rencuzogullari, and
M. L. Scott.
6th Intl. Symp. on High Performance Computer Architecture (HPCA),
Toulouse, France, Jan. 2000.
Also TR 711, Computer
Science Dept., Univ. of Rochester, Apr. 1999.
1999
-
“The Implementation of
Cashmere,” by R. J. Stets, D. Chen,
S. Dwarkadas, N. Hardavellas, G. C. Hunt,
L. Kontothanassis, G. Magklis, S. Parthasarathy,
U. Rencuzogullari, and M. L. Scott.
TR 723, Computer Science Dept., Univ. of Rochester, Dec. 1999.
-
Programming Language Pragmatics, by
M. L. Scott.
Morgan Kaufmann Publishers, Oct. 1999 (© 2000).
-
“Component-based Operating System APIs: A Versioning and Distributed Resource Solution,”
by R. Stets, G. C. Hunt, and M. L. Scott.
Computer, July 1999.
-
“Intercepting and
Instrumenting COM Applications,” by G. C. Hunt and
M. L. Scott. 5th Conf. on Object-Oriented
Technologies and Systems (COOTS), San Diego, CA, May 1999.
-
“The Coign Automatic Distributed Partitioning System,”
by G. C. Hunt and M. L. Scott.
3rd
Symp. on Operating Systems Design and Implementation (OSDI),
New Orleans, LA, Feb. 1999.
-
“Comparative Evaluation
of Fine- and Coarse-Grain Approaches for Software Distributed Shared
Memory,” by R. Stets, S. Dwarkadas,
K. Gharachorloo, L. Kontothanassis, D. Scales,
and M. L. Scott.
5th Intl. Symp. on High Performance Computer Architecture (HPCA),
Orlando, FL, Jan. 1999.
Also Research Report
98/7, Western Research Lab, Digital Equip. Corp., Dec. 1998, and
TR 699, Computer Science
Dept., Univ. of Rochester, Jan. 1999.
Earlier version
published as Technical Report
98/6, Cambridge Research Lab, Digital Equip. Corp., Apr. 1998, and
presented at the 7th Wkshp. on Scalable Shared
Memory Multiprocessors (SSMM), Barcelona, Spain, June 1998 (abstract only; no
proceedings). In conjunction with ISCA XXV.
1998
1997
-
“Cashmere-2L: Software
Coherent Shared Memory on a Clustered Remote-Write Network,”
by R. Stets, S. Dwarkadas, N. Hardavellas, G. Hunt,
L. Kontothanassis, S. Parthasarathy, and
M. L. Scott.
16th ACM Symp. on
Operating Systems Principles (SOSP), Saint Malo, France,
Oct. 1997.
-
“Coign:
Automated Distributed Partitioning of Component
Applications,”
by G. C. Hunt and M. L. Scott.
Poster presentation,
16th ACM Symp. on
Operating Systems Principles (SOSP), Saint Malo, France,
Oct. 1997.
-
“Coherence
Controller Architectures for SMP-Based CC-NUMA
Multiprocessors,” by M. M. Michael, A. K. Nanda,
B.-H. Lim, and M. L. Scott.
24th Intl. Symp. on
Computer Architecture (ISCA), Denver, CO, June 1997.
Earlier version published as RC 20675
(91675), IBM T. J. Watson Research Center, Jan. 1997.
-
“VM-Based Shared Memory
on Low-Latency, Remote-Memory-Access Networks,”
by L. I. Kontothanassis, G. Hunt, R. Stets,
N. Hardavellas, M. Cierniak, S. Parthasarathy,
W. Meira, S. Dwarkadas, and M. L. Scott.
24th Intl. Symp. on
Computer Architecture (ISCA), Denver, CO, June 1997.
Earlier version published as TR 643, Computer Science Dept.,
Univ. of Rochester, Nov. 1996.
-
“Relative
Performance of Preemption-Safe Locking and Non-Blocking
Synchronization on Multiprogrammed Shared Memory
Multiprocessors,”
by M. M. Michael and M. L. Scott.
Proc. of the 11th Intl. Parallel
Processing Symp. (IPPS), Geneva, Switzerland, Apr. 1997.
Earlier version published as
“Concurrent Update on
Multiprogrammed Shared Memory Multiprocessors,”
TR 614, Computer Science Dept., Univ. of Rochester, Apr. 1996.
-
“Efficient Use of
Memory-Mapped Network Interfaces for Shared Memory Computing,”
by N. Hardavellas, G. C. Hunt, S. Ioannidas, R. Stets,
S. Dwarkadas, L. Kontothanassis, and M. L. Scott.
Bull. of the IEEE Tech. Comm. on Computer Architecture,
Mar. 1997.
-
“Coign: Efficient
Instrumentation for Inter-Component Communication
Analysis,” by G. C. Hunt and M. L. Scott.
TR 648, Computer Science Dept., Univ. of Rochester,
Feb. 1997.
-
“Scheduler-Conscious
Synchronization,”
by L. I. Kontothanassis, R. W. Wisniewski, and M. L. Scott.
ACM Trans. on Computer Systems,
Feb. 1997.
Earlier version published as TR 550, Computer
Science Dept., Univ. of Rochester, Dec. 1994.
1996
-
“Memory
Models,” by L. I. Kontothanassis and
M. L. Scott. Chapter 24, pp. 699–722,
in Parallel and Distributed Computing Handbook,
A. Y. Zomaya, editor.
McGraw-Hill, 1996.
-
“An Efficient Algorithm for
Concurrent Priority Queue Heaps”
by G. C. Hunt, M. M. Michael, S. Parthasarathy, and M. L. Scott.
Information Processing Letters, Nov. 1996.
Earlier version published as TR 560, Computer Science
Dept., Univ. of Rochester, Dec. 1994.
-
“Implementation of Cashmere” (extended abstract),
by M. L. Scott, W. Li, L. Kontothanassis,
G. Hunt, M. Michael, R. Stets, N. Hardavellas,
W. Meira, A. Poulos, M. Cierniak,
S. Parthasarathy, and M. Zaki.
6th Workshop on Scalable Shared Memory Multiprocessors,
Aug. 1996.
Also on-line:
presentation slides.
-
“Protocol
Processors vs. Custom-Hardware Coherence Adaptors for SMP-Based
CC-NUMA Multiprocessor Architectures” (extended abstract),
by M. M. Michael, A. K. Nanda, B.-H. Lim, and
M. L. Scott.
6th Workshop on Scalable Shared Memory Multiprocessors,
Aug. 1996.
-
“Using Peer Support to
Reduce Fault-Tolerant Overhead in Distributed Shared
Memories,” by G. C. Hunt and M. L. Scott.
TR 626, Computer Science Dept., Univ. of Rochester, June 1996.
-
“Simple, Fast, and
Practical Non-Blocking and Blocking Concurrent Queue Algorithms,”
by M. M. Michael and M. L. Scott.
15th ACM Symp. on Principles of
Distributed Computing (PODC), Philadelphia, PA, May 1996.
Earlier version published as TR 600, Computer Science Dept.,
Univ. of Rochester, Dec. 1995.
-
“Using Memory-Mapped
Network Interfaces to Improve the Performance of Distributed Shared
Memory,”
by L. I. Kontothanassis and M. L. Scott.
2nd Intl. Symp. on High Performance
Computer Architecture (HPCA),
San Jose, CA, Feb. 1996.
Earlier version published as
“Distributed Shared Memory for New Generation Networks,”
TR 578, Computer Science
Dept., Univ. of Rochester, Mar. 1995.
-
“The Topological Barrier: A
Synchronization Abstraction for Regularly-Structured Parallel
Applications,”
by M. L. Scott and M. M. Michael.
TR 605, Computer Science Dept., Univ.
of Rochester, Jan. 1996.
1995
-
“Correction of a Memory
Management Method for Lock-Free Data Structures,”
by M. M. Michael and M. L. Scott.
TR 599, Computer Science Dept., Univ. of Rochester, Dec. 1995.
-
“High
Performance Software Coherence for Current and Future
Architectures,”
by L. I. Kontothanassis and M. L. Scott.
J. of Parallel and Distributed Computing, Nov. 1995.
-
“Efficient
Shared Memory with Minimal Hardware Support,”
by L. I. Kontothanassis and M. L. Scott.
Computer Architecture News, Sep. 1995.
-
“High Performance
Synchronization Algorithms for Multiprogrammed Multiprocessors,”
by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott.
5th ACM Symp. on Principles and Practice
of Parallel Programming (PPoPP), July 1995.
-
“Lazy Release Consistency for Hardware-Coherent Multiprocessors,”
by L. I. Kontothanassis, M. L. Scott, and R. Bianchini.
Supercomputing ’95, San Diego, CA, Nov. 1995.
Official published version is HTML.
Earlier version published as TR 547, Computer Science Dept., Univ. of Rochester, Dec. 1994.
-
“Using Simple Page
Placement Policies to Reduce the Cost of Cache Fills in
Coherent Shared-Memory Systems,”
by M. Marchetti, L. Kontothanassis, R. Bianchini,
and M. L. Scott.
9th Intl. Parallel Processing Symp. (IPPS),
Santa Barbara, CA, Apr. 1995.
Earlier version published as TR 535, Computer Science
Dept., Univ. of Rochester, Sep. 1994.
-
“Implementation
of Atomic Primitives on Distributed Shared-Memory
Multiprocessors,”
by M. M. Michael and M. L. Scott.
1st Intl. Symp. on High Performance Computer Architecture (HPCA),
Raleigh, NC, Jan. 1995.
Earlier version published as “Scalability of Atomic Primitives
on Distributed Shared Memory Multiprocessors,” TR 528, Computer
Science Dept., Univ. of Rochester, July 1994.
-
“Software Cache
Coherence for Large Scale Multiprocessors,”
by L. I. Kontothanassis and M. L. Scott.
1st Intl. Symp. on High Performance Computer Architecture (HPCA),
Raleigh, NC, Jan. 1995.
Earlier version published as TR 513, Computer
Science Dept., Univ. of Rochester, July 1994.
1994
-
“Cache
Performance in Vector Supercomputers,”
by L. I. Kontothanassis, R. Sugumar, G. J. Faanes,
J. E. Smith, and M. L. Scott.
Supercomputing ’94, Washington, DC, Nov. 1994.
-
“The
Advantages of Multiple Parallelizations in Combinatorial Search,”
by L. A. Crowl, M. Crovella, T. J. LeBlanc, and M. L. Scott.
J. of Parallel and Distributed Computing, Apr. 1994.
Earlier versions published as “Beyond Data Parallelism: The
Advantages of Multiple Parallelizations in Combinatorial Search,”
TR 92–80–06,
Computer Science Dept., Oregon State Univ., Dec. 1992, and TR 451, Computer
Science Dept., Univ. of Rochester, Apr 1993.
-
“Fast,
Contention-Free Combining Tree Barriers for Shared-Memory
Multiprocessors,”
by M. L. Scott and J. M. Mellor-Crummey.
Intl. J. of Parallel Programming, Aug. 1994.
Previous version published as TR 429, Computer Science Dept., Univ. of Rochester, June 1992.
-
“Scalable Spin Locks for
Multiprogrammed Systems,”
by R. W. Wisniewski, L. I. Kontothanassis, and M. L. Scott.
8th Intl. Parallel Processing Symp., Cancun, Mexico, Apr. 1994.
Also TR 454, Computer
Science Dept., Univ. of Rochester, Apr. 1993.
-
“Scalability of
Atomic Primitives on Distributed Shared-Memory Multiprocessors”
(extended abstract),
by M. M. Michael and M. L. Scott.
4th Wkshp. on Scalable Shared Memory Multiprocessors,
Chicago, IL, Apr. 1994.
-
“Issues in
Software Cache Coherence” (extended abstract),
by L. I. Kontothanassis and M. L. Scott.
4th Wkshp. on Scalable Shared Memory Multiprocessors,
Chicago, IL, Apr. 1994.
1993
-
“Common Runtime Support
for High-Performance Parallel Languages,”
by G. Fox, S. Ranka, M. L. Scott, A. D. Malony, et
al. Workshop description,
Supercomputing ’93, Portland, OR, Nov. 1993.
-
“The Prospects
for Parallel Programs on Distributed Systems,”
by M. L. Scott.
Invited position paper,
4th Symp. on Experiences with Distributed and Multiprocessor
Systems (SEDMS), San Diego, CA, Sep. 1993.
-
“False
Sharing and its Effect on Shared Memory Performance,”
by W. J. Bolosky and M. L. Scott.
4th Symp. on Experiences with Distributed and Multiprocessor
Systems (SEDMS), San Diego, CA, Sep. 1993.
-
“Common Runtime
Support for High-Performance Parallel Languages,”
by G. Fox, S. Ranka, et al.
Report 001, Parallel Compiler Runtime Consortium, July 1993.
Based on a Wkshp. held at Syracuse Univ., June 1993.
-
“Fast Mutual Exclusion, Even
with Contention,”
by M. M. Michael and M. L. Scott.
TR 460, Computer Science Dept., Univ. of Rochester, June 1993.
-
“Kernel-Kernel
Communication in a Shared-Memory Multiprocessor,”
by E. M. Chaves, P. Ch. Das, T. J. LeBlanc, B. D. Marsh, and M. L. Scott.
Concurrency—Practice and Experience, May 1993.
Also TR 368, Computer
Science Dept., Univ. of Rochester, Apr. 1991.
Earlier version
presented at the 2nd Symp. on Experiences with Distributed and
Multiprocessor Systems (SEDMS), Atlanta, GA, Mar. 1991.
-
“Linking Shared
Segments,”
by W. E. Garrett, M. L. Scott, R. G. Bianchini, L. I. Kontothanassis,
R. A. McCallum, J. A. Thomas, R. Wisniewski, and S. Luk.
Usenix Winter Technical Conf., Jan. 1993.
1992
-
“Evaluation of Multiprocessor Memory Systems Using Off-Line Optimal Behavior,”
by W. J. Bolosky, and M. L. Scott.
J. of Parallel and Distributed Computing, Aug. 1992.
Also TR 403, Computer
Science Dept., Univ. of Rochester, Sep. 1991.
-
“A Trace-Based
Comparison of Shared Memory Multiprocessor Architectures,”
by W. J. Bolosky and M. L. Scott.
TR 432, Computer Science Dept., Univ. of Rochester, July 1992.
-
“Operating
System Support for Animate Vision,”
by B. D. Marsh, C. M. Brown, T. J. LeBlanc, M. L. Scott, T. G. Becker,
P. Das, J. Karlsson, and C. A. Quiroz.
J. of Parallel and Distributed Computing, June 1992.
-
“Shared Memory Ought to
be Commonplace” (extended abstract),
by M. L. Scott and W. Garrett.
3rd Wkshp. on Workstation Operating Systems (WWOS, now HotOS),
Key Biscayne, FL, Apr. 1992.
-
“Dynamic Sharing and
Backward Compatibility on 64-Bit Machines,”
by W. E. Garrett, R. Bianchini, L. Kontothanassis
R. A. McCallum, J. Thomas, R. Wisniewski, and M. L. Scott.
TR 418, Computer Science Dept., Univ. of Rochester, Apr. 1992.
-
“The Rochester Checkers
Player: Multimodel Parallel Programming for Animate Vision,”
by B. D. Marsh, C. M. Brown, T. J. LeBlanc, M. L. Scott, T. G. Becker,
P. Das, J. Karlsson, and C. A. Quiroz.
Computer, Feb. 1992.
Earlier versions published in the Univ. of Rochester
1991–92 Computer Science and Engineering Research
Review, and as TR 374, Computer Science Dept.,
Univ. of Rochester, June 1991.
-
“The Psyche Parallel
Operating System,”
by T. J. LeBlanc, M. L. Scott, B. Marsh,
E. Markatos, C. Dubnicki, M. Crovella, and
T. Becker.
Bulletin of the IEEE Computer Society Technical Committee on
Operating Systems and Application Environments 6:1, 1992.
1991
-
“First-Class
User-Level Threads,”
by B. D. Marsh, M. L. Scott, T. J. LeBlanc, and E. P. Markatos.
ACM Symp. on Operating Systems Principles (SOSP), Pacific Grove,
CA, Oct. 1991.
-
“Scalable
Reader-Writer Synchronization for Shared-Memory
Multiprocessors,”
by J. M. Mellor-Crummey and M. L. Scott.
3rd ACM Symp. on Principles and Practice of Parallel Programming
(PPoPP), Williamsburg, VA, Apr. 1991.
-
“NUMA Policies and Their Relation to Memory Architecture,”
by W. J. Bolosky, M. L. Scott, R. P. Fitzgerald, R. J. Fowler, and A. L. Cox.
4th Intl. Conf. on Architectural Support for Programming Languages and
Operating Systems (ASPLOS), Santa Clara, CA, Apr. 1991.
-
“Synchronization Without
Contention,”
by J. M. Mellor-Crummey and M. L. Scott.
4th Intl. Conf. on Architectural Support for Programming Languages
and Operating Systems (ASPLOS), Santa Clara, CA, Apr. 1991.
-
“Algorithms for
Scalable Synchronization on Shared-Memory Multiprocessors,”
by J. M. Mellor-Crummey and M. L. Scott.
ACM Trans. on Computer Systems,
Feb. 1991.
Winner, 2006 Edsger
W. Dijkstra Prize in Distributed Computing.
Earlier version published as
TR 342, Computer Science
Dept., Univ. of Rochester, and
COMP TR 90–114, Center for Research on Parallel Computation,
Rice Univ., Apr. 1990.
-
“The Lynx Distributed Programming Language: Motivation, Design, and Experience,”
by M. L. Scott.
Computer Languages, 1991.
Earlier version published as
TR 308,
Computer Science Dept., Univ. of Rochester, Aug. 1989, revised
Aug. 1990.
1990
-
“PENGUIN:
A Language for Reactive
Graphical User Interface Programming,”
by S.-K. Yap and M. L. Scott.
Interact '90 (the 3rd IFIP Conf. on Human-Computer Interaction),
Cambridge, England,
Aug. 1990.
-
“Multi-Model Parallel Programming in Psyche,”
by M. L. Scott, T. J. LeBlanc, and B. D. Marsh.
ACM Symp. on Principles and Practice of Parallel Programming (PPoPP),
Seattle, WA, Mar. 1990.
-
“Implementation
Issues for the Psyche Multiprocessor Operating System,”
by M. L. Scott, T. J. LeBlanc, B. D. Marsh,
T. G. Becker, C. Dubnicki, E. P. Markatos, and
N. G. Smithline.
Computing Systems, Winter 1990.
Earlier version, by
Scott, LeBlanc, and Marsh, presented at the Wkshp. on Experiences
with Building Distributed and Multiprocessor Systems,
Ft. Lauderdale, FL, Oct. 1989.
1989
-
“External Sorting on a
Parallel Interleaved File System,”
by P. C. Dibble and M. L. Scott.
Univ. of Rochester 1989–90 Computer Science and Engineering
Research Review.
-
“Simple But
Effective Techniques for NUMA Memory Management,”
by W. J. Bolosky, R. P. Fitzgerald, and M. L. Scott.
ACM Symp. on Operating Systems Principles (SOSP), Litchfield
Park, AZ, Dec. 1989.
-
“A Multi-User,
Multi-Language Open Operating System” (extended abstract),
by M. L. Scott, T. J. LeBlanc, and B. D. Marsh.
2nd Wkshp. on Workstation Operating Systems (WWOS, now HotOS),
Pacific Grove, CA, Sep. 1989.
-
“Beyond Striping: The
Bridge Multiprocessor File System,”
by P. C. Dibble and M. L. Scott.
Computer Architecture News, Sep. 1989.
-
“Experience
with Charlotte: Simplicity and Function in a Distributed Operating
System,”
by R. A. Finkel, M. L. Scott, Y. Artsy, and H.-Y. Chang.
IEEE Trans. on Software Engineering, June 1989.
Extended abstract
presented at the IEEE Computer Society Wkshp. on Design
Principles for Experimental Distributed Systems,
Purdue Univ., Oct. 1986.
Earlier version published as Computer Sciences Technical Report #653,
UW–Madison, July 1986.
-
“Memory Management for
Large-Scale NUMA Multiprocessors,”
by T. J. LeBlanc, B. D. Marsh, and M. L. Scott.
TR 311, Computer Science Dept., Univ. of Rochester, Mar. 1989.
-
“Evolution of an Operating
System for Large-Scale Shared-Memory Multiprocessors,”
by M. L. Scott, T. J. LeBlanc, and B. D. Marsh.
TR 309, Computer Science Dept., Univ. of Rochester, Mar. 1989.
1988
-
“A Simple
Mechanism for Type Security Across Compilation Units,”
by M. L. Scott and R. A. Finkel.
IEEE Trans. Software Engineering, Aug. 1988.
Earlier version published as Computer Sciences Technical
Report #541, UW–Madison, May 1984.
-
“Design Rationale for
Psyche, a General-Purpose Multiprocessor Operating System,”
by M. L. Scott, T. J. LeBlanc, and B. D. Marsh.
17th Intl. Conf. on Parallel Processing (ICPP),
St. Charles, IL, Aug. 1988.
Also published in the Univ. of Rochester
1988–89 Computer Science and Engineering Research
Review.
-
“Ant Farm: A
Lightweight Process Programming Environment,”
by M. L. Scott and K. R. Jones.
BPR 21, Computer Science Dept., Univ. of Rochester, Aug. 1988.
-
“Large-Scale Parallel
Programming: Experience with the BBN Butterfly Parallel
Processor,”
by T. J. LeBlanc, M. L. Scott, and C. M. Brown.
ACM SIGPLAN PPEALS—Parallel Programming: Experience with
Applications, Languages and Systems (now PPoPP), July 1988.
Also BPR 22, Computer
Science Dept., Univ. of Rochester, Sep. 1988.
-
“Bridge: A
High-Performance File System for Multiprocessor Systems,”
by P. C. Dibble, M. L. Scott, and C. S. Ellis.
Intl. Conf. on Distributed Computing Systems (ICDCS), June 1988.
-
“A Grammar-Based
Approach to the Automatic Generation of User-Interface Dialogues,”
by M. L. Scott and S.-K. Yap.
1988 ACM Conf. on Human Factors in Computing Systems (SIGCHI),
Washington, DC, May 1988.
1987
-
“An Empirical Study of
Message-Passing Overhead,”
by M. L. Scott and A. L. Cox.
7th Intl. Conf. on Distributed Computing Systems (ICDCS),
Berlin, West Germany, Sep. 1987.
Also BPR 17, Computer
Science Dept., Univ. of Rochester, Dec. 1986.
-
“Psyche:
A General-Purpose Operating System for Shared-Memory
Multiprocessors,”
by M. L. Scott and T. J. LeBlanc.
TR 223, BPR 19, Computer Science Dept., Univ. of Rochester,
July 1987.
-
“Language Support for
Loosely Coupled Distributed Programs,”
by M. L. Scott.
IEEE Trans. on Software Engineering, Jan. 1987.
Also TR 183,
Computer Science Dept.,
Univ. of Rochester, Jan. 1986, revised Sep. 1986.
1986
-
“DARPA Parallel
Architecture Benchmark Study,”
by C. M. Brown, R. J. Fowler, T. J. LeBlanc,
M. L. Scott, M. Srinivas, L. Bukys, J. Costanzo,
L. Crowl, P. Dibble, N. Gafter, B. Marsh,
T. Olson, and L. Sanchis.
BPR 13, Computer Science Dept., Univ. of Rochester, Oct. 1986.
-
“The Interface Between
Distributed Operating System and High-Level Programming
Language,”
by M. L. Scott.
15th Intl. Conf. on Parallel Processing (ICPP),
St. Charles, IL, Aug. 1986.
Also TR 182, BPR 6,
Computer Science Dept., Univ. of Rochester, Jan. 1986,
revised Sep. 1986.
Reprinted in the University's 1986–87 Computer Science
and Engineering Research Review.
-
“LYNX Reference
Manual,”
by M. L. Scott.
BPR 7, Computer Science Dept., Univ. of Rochester, Mar. 1986,
revised Aug. 1986.
1985
1984
-
“A Framework for the
Evaluation of High-Level Languages for Distributed Computing,”
by M. L. Scott.
Computer Sciences Technical Report #563, UW–Madison,
Oct. 1984.
-
“LYNX: A Dynamic
Distributed Programming Language,”
by M. L. Scott and R. A. Finkel.
13th Intl. Conf. on Parallel Processing (ICPP),
Bellaire, MI, Aug. 1984.
-
“Partitioning Files
for Huffman Encoding,”
by M. L. Scott and R. A. Finkel.
Computer Sciences Technical Report #540, UW–Madison,
Apr. 1984.
1983