Sandhya Dwarkadas's Publications

The documents contained in these directories are included by the contributing authors as a means to ensure timely dissemination of scholarly and technical work on a non-commercial basis. Copyright and all rights therein are maintained by the authors or by other copyright holders, notwithstanding that they have offered their works here electronically. It is understood that all persons copying this information will adhere to the terms and constraints invoked by each such copyright. These works may not be reposted without the explicit permission of the copyright holder. The documents describe work that has been supported in part by various grants from the National Science Foundation, the National Institute of Health, and the Defense Advanced Research Projects Agency, as well as support from companies that include IBM, Sun, Intel, HP, and (former) Compaq/DEC. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the granting agencies.

JOURNAL PUBLICATIONS

• ``Preventing Coherence State Side Channel Leaks Using TimeCache'', Divya Ojha and Sandhya Dwarkadas, IEEE Transactions on Computers, Volume 72, Issue 2, February 2023.

• ``MAPPER: Managing Application Performance via Parallel Efficiency Regulation'', Sharanyan Srikanthan, Sayak Chakraborti, Princeton Ferro, and Sandhya Dwarkadas, ACM Transactions on Architecture and Code Optimization, Volume 19, Issue 2, June 2022.

• ``An Application-Tailored Approach to Hardware Cache Coherence'', A. Shriraman, H. Zhao and S. Dwarkadas, IEEE Computer, Special Issue on Multicore Coherence, Volume 46, Number 10, October 2013.

• ``Software Distributed Shared Memory'', S. Dwarkadas, Encyclopedia of Parallel Computing, Springer, D. Padua (editor), pages 1848-1855, 2011.

• ``Hierarchical Parallelization of Gene Differential Association Analysis'', M. Needham, R. Hu, S. Dwarkadas, and X. Qiu, BMC Bioinformatics, 12:374, September 2011.

• ''Implementation Tradeoffs in the Design of Flexible Transactional Memory Support'', A. Shriraman, S. Dwarkadas, and M. L. Scott, Journal of Parallel and Distributed Computing: Special Issue on Transactional Memory, Volume 70, Issue 10, October 2010.

• "Analyzing Conflicts in Hardware-Supported Memory Transactions", A. Shriraman and S. Dwarkadas, International Journal of Parallel Programming, July 2010.

• ``Shared Memory Computing on Clusters with Symmetric Multiprocessors and System Area Networks'' , L. Kontothanassis, R. Stets, G. Hunt, U. Rencuzogullari, G. Altekar, S. Dwarkadas, and M. L. Scott, ACM Transactions on Computer Systems (TOCS), Vol. 23, Issue 3, August 2005.

• Parallel Metropolis-Coupled Markov Chain Monte Carlo for Bayesian Phylogenetic Inference, G. Altekar, S. Dwarkadas, J. P. Huelsenbeck, and F. Ronquist, Volume 20, Number 3, Journal of BioInformatics, February 2004. TR version available here .

• ``Dynamic Frequency and Voltage Scaling for a Multiple Clock Domain Microprocessor'', G. Magklis, G. Semeraro, D. H. Albonesi, S. Dropsho, S. Dwarkadas, and M. L. Scott. IEEE Micro, Special Issue on the Top Picks from Microarchitecture Conferences, Nov./Dec., 2003.

• Dynamically Tuning Processor Resources with Adaptive Processing'', D. H. Albonesi, R. Balasubramonian, S. G. Dropsho, S. Dwarkadas, E. G. Friedman, M. C. Huang, V. Kursun, G. Magklis, M. L. Scott, G. Semeraro, P. Bose, A. Buyuktosunoglu, P. W. Cook, and S. E. Schuster, IEEE Computer, December 2003.

• ``A Dynamically Tunable Memory Hierarchy'', R. Balasubramonian, D. Albonesi, A. Buyuktosunoglu, and S. Dwarkadas, IEEE Transactions on Computers, Vol 52, No. 10, pp.1243-1258, October 2003.

• Shared State for Distributed Interactive Data Mining Applications, S. Parthasarathy and S. Dwarkadas, International Journal of Distributed and Parallel Databases, pp. 129-155, Volume 11, Number 2, March 2002.

• Sequence Mining in Dynamic and Interactive Environments, S. Parthasarathy, M. J. Zaki, M. Ogihara, and S. Dwarkadas, in Knowledge Discovery for Business Information Systems, W. Abramowicz and J. Zurada (eds.), Chapter 16, Kluwer Academic, 2000.

• Active Mining in a Distributed Setting, S. Parthasarathy, S. Dwarkadas, and M. Ogihara, in Large-Scale Parallel Data Mining, LNAI State-of-the-Art-Survey, Mohammed Zaki and Howard Ho (eds.), Vol. 1759, Springer-Verlag, 2000.

• Portable Parallel Programming on Emerging Platforms, G. Delamarter, S. Dwarkadas, A. Frank, and R. Stets, Current Science Journal published by the Indian Academy of Sciences, April 2000.

• CRAUL: Compiler and Run-Time Integration for Adaptation Under Load, S. Ioannidis, U. Rencuzogullari, R. Stets, and S. Dwarkadas, invited paper, Journal of Scientific Programming, August 1999.

• Combining Compile-Time and Run-Time Support for Efficient Software Distributed Shared Memory, S. Dwarkadas, H. Lu, A. L. Cox, R. Rajamony, and W. Zwaenepoel, Proceedings of the IEEE, March 1999.

• Adaptive Protocols for Software Distributed Shared Memory, C. Amza, A. L. Cox, S. Dwarkadas, L-J Jin, K. Rajamani, and W. Zwaenepoel, Proceedings of the IEEE, March 1999.

• Quantifying the Performance Differences between PVM and TreadMarks, H. Lu, S. Dwarkadas, A. L. Cox, and W. Zwaenepoel, Journal of Parallel and Distributed Computing, June 1997.

• TreadMarks: Shared Memory Computing on Networks of Workstations, C. Amza, A. L. Cox, S. Dwarkadas, P. Keleher, H. Lu, R. Rajamony, W. Yu, and W. Zwaenepoel, IEEE Computer, February 1996.

• An Evaluation of Software-Based Release Consistent Protocols, P. Keleher, A. L. Cox, S. Dwarkadas, and W. Zwaenepoel, Journal of Parallel and Distributed Computing, October 1995.

• Integrating Parallelization Strategies for Linkage Analysis, S.K. Gupta, A.A. Schaffer, A. L. Cox, S. Dwarkadas, and W. Zwaenepoel, Computers and Biomedical Research, Vol. 28, pp. 116-139, June 1995.

• Parallelization of General Linkage Analysis Problems, S. Dwarkadas, A.A. Schaffer, R.W. Cottingham, A.L. Cox, P. Keleher, and W. Zwaenepoel, Human Heredity, Vol. 44, pp. 127-141, July 1994.

• Execution-Driven Simulation of Multiprocessors: Address and Timing Analysis, S. Dwarkadas, J.R. Jump and J.B. Sinclair, ACM Transactions on Modeling and Computer Simulation, October 1994.

• The Efficient Simulation of Parallel Computer Systems, R.G. Covington, S. Dwarkadas, J.R. Jump, J.B. Sinclair,and S. Madala, International Journal in Computer Simulation, January 1991.

REFEREED CONFERENCE AND WORKSHOP PAPERS

• TimeCache: Using Time to Eliminate Cache Side Channels when Sharing Software, Divya Ojha and Sandhya Dwarkadas, International Symposium on Computer Architecture (ISCA), June 2021.

• ``Performance Characterization of HTAP Workloads'', Utku Sirin (EPFL); Sandhya Dwarkadas (University of Rochester); and Anastasia Ailamaki (EPFL), 37th IEEE International Conference on Data Engineering (ICDE), short paper, April 2021.

• ``Workload Interference Analysis for HTAP'', Utku Sirin (EPFL); Sandhya Dwarkadas (University of Rochester); Anastasia Ailamaki (EPFL), Gong Show at the 2021 Conference on Innovative Data Systems Research (CIDR), January 2021.

• ``On the Impact of Instruction Address Translation Overhead'', Yufeng Zhou, Xiaowan Dong, Alan L Cox, and Sandhya Dwarkadas, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), March 2019.

• ``Managing Application Parallelism via Parallel Efficiency Regulation: Poster'', Sharanyan Srikanthan, Princeton Ferro, Sayak Chakraborti, and Sandhya Dwarkadas, Principles and Practice of Parallel Programming (PPoPP), February 2019.

• ``Shielding Software from Privileged Side-Channel Attacks'', Xiaowan Dong, Zhuojia Shen, John Criswell, Alan L. Cox, and Sandhya Dwarkadas, Usenix Security Symposium, Baltimore, MD, August 2018.

• Spectres, Virtual Ghosts, and Hardware Support, Xiaowan Dong, Zhuojia Shen, John Criswell, Alan Cox, and Sandhya Dwarkadas, Hardware and Architectural Support for Security and Privacy (HASP), workshop in conjunction with ISCA, Los Angeles, CA, June 2018.

• Coherence Stalls or Latency Tolerance: Informed CPU Scheduling for Socket and Core Sharing, Sharanyan Srikanthan, Sandhya Dwarkadas, and Kai Shen, Usenix Annual Technical Conference (Usenix ATC), Denver, CO, June 2016.

• Shared Address Translation Revisited, Xiaowan Dong, Sandhya Dwarkadas, and Alan L. Cox, EuroSys conference, April 2016.

• ``Characterization of Shared Library Access Patterns of Android Applications'', Xiaowan Dong, Sandhya Dwarkadas, and Alan L. Cox, IEEE International Symposium on Workload Characterization (IISWC), poster paper, Atlanta, GA,, October 2015.

• Data Sharing or Resource Contention: Toward Performance Transparency on Multicore Systems (CODE AVAILABLE ), Sharanyan Srikanthan, Sandhya Dwarkadas, and Kai Shen, Usenix Annual Technical Conference (Usenix ATC), Santa Clara, CA, July 2015.

• Protozoa: Adaptive Granularity Cache Coherence, H. Zhao, A. Shriraman, S. Kumar, and S. Dwarkadas, International Symposium on Computer Architecture (ISCA), June 2013.

• Power Containers: an OS Facility for Fine-Grained Power and Energy Management on Multicore Servers, K. Shen, A. Shriraman, S. Dwarkadas, X. Zhang, and Z. Chen, International Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2013.

• Verifying safety and liveness for the FlexTM hybrid transactional memory, P. Abdulla, S. Dwarkadas, A. Rezine, A. Shriraman, and Y. Zhu, Proceedings of the Conference on Design, Automation and Test in Europe (DATE), March 2013.

• Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy, S. Kumar, H. Zhao, A. Shriraman, E. Matthews, S. Dwarkadas, and L. Shannon, International Symposium on Microarchitecture (MICRO), December 2012.

• A Flexible Framework for Throttling-Enabled Multicore Management (TEMM), X. Zhang, R. Zhong, S. Dwarkadas, and K. Shen, International Conference on Parallel Processing (ICPP), September 2012.

• Power and Energy Containers for Multicore Servers (poster paper), K. Shen, A. Shriraman, X. Zhang, and S. Dwarkadas, SIGMETRICS, June 2012.

• "SPATL: Honey, I Shrunk the Coherence Directory", H. Zhao, A. Shriraman, S. Dwarkadas, and V. Srinivasan, International Symposium on Parallel Architectures and Compilation Techniques (PACT), October 2011.

• "POPS: Coherence Protocol Optimization for Both Private and Shared Data", H. Hossain, S. Dwarkadas, and M. Huang, International Symposium on Parallel Architectures and Compilation Techniques (PACT), October 2011.

• "SPACE: Sharing Pattern-based Directory Coherence for Multicore Scalability", H. Zhao, A. Shriraman, and S. Dwarkadas, International Symposium on Parallel Architectures and Compilation Techniques (PACT), September 2010.

• "An Evaluation of Per-Chip Nonuniform Frequency Scaling on Multicores", X. Zhang, K. Shen, S. Dwarkadas, and R. Zhong, Usenix Technical Conference, June 2010.

• "Sentry: Light-Weight Auxiliary Memory Access Control", A. Shriraman and S. Dwarkadas, International Symposium on Computer Architecture (ISCA), June 2010.

• "DDCache: Decoupled and Delegable Cache Data and Metadata", H. Hossain, S. Dwarkadas, and M. Huang, International Symposium on Parallel Architectures and Compilation Techniques (PACT), September 2009.

• Refereeing Conflicts in Hardware Transactional Memory, A. Shriraman and S. Dwarkadas, International Conference on Supercomputing (ICS), June 2009.

• Hardware Execution Throttling for Multi-core Resource Management, X. Zhang, S. Dwarkadas, and K. Shen, Usenix, June 2009.

• Towards Practical Page Coloring-based Multi-core Cache Management, X. Zhang, S. Dwarkadas, and K. Shen, EuroSys conference, April 2009.

• Tapping into Parallelism with Transactional Memory, A. Shriraman, S. Dwarkadas, and M. L. Scott, ;login: (the USENIX Magazine), April 2009.

• Improving Support for Locality and Fine-Grain Sharing in Chip Multiprocessors, H. Hossain, S. Dwarkadas, and M. C. Huang, International Symposium on Parallel Architectures and Compilation Techniques (PACT), October 2008.

• Flexible Decoupled Transactional Memory Support, A. Shriraman, S. Dwarkadas, and M. L. Scott, International Symposium on Computer Architecture (ISCA), June 2008.

• DIMM: Architectural Support for Data Isolation and Memory Monitoring, A. Shriraman, S. Dwarkadas, and M. L. Scott, poster presentation, 13th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008.

• Shared Resource Control in Multi-Core Processors, X. Zhang, S. Dwarkadas, and K. Shen, poster presentation, 13th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008.

• Hardware Counter Driven On-the-Fly Request Signatures, K. Shen, M. Zhong, S. Dwarkadas, C. Li, C. Stewart, and X. Zhang, International Symposium on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2008.

• An Integrated Hardware-Software Approach to Flexible Transactional Memory, A. Shriraman, M. F. Spear, H. Hossain, V. J. Marathe, S. Dwarkadas, and M. L. Scott, 34th Intl. Symp. on Computer Architecture (ISCA), San Diego, CA, June 2007. Earlier but expanded version available as TR 910, Computer Science Dept., Univ. of Rochester, Dec. 2006.

• Nonblocking Transactions Without Indirection Using Alert-on-Update, M. F. Spear, A. Shriraman, L. Dalessandro, S. Dwarkadas, and M. L. Scott, 19th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA), San Diego, CA, June 2007.

• Processor Hardware Counter Statistics as a First-Class System Resource, X. Zhang, S. Dwarkadas, G. Folkmanis, and K. Shen, Eleventh Workshop on Hot Topics in Operating Systems (HotOS XI), San Diego, CA, May 2007.

• Alert-on-Update: A Communication Aid for Shared Memory Multiprocessors (poster paper), M. F. Spear, A. Shriraman, H. Hossain, S. Dwarkadas, and M. L. Scott, Twelfth ACM Symp. on Principles and Practice of Parallel Programming (PPoPP), Mar. 2007.

• , ``Hardware Acceleration of Software Transactional Memory'', A. Shriraman, V. J. Marathe, S. Dwarkadas, M. L. Scott, D. Eisenstat, C. Heriot, W. N. Scherer III, and M. F. Spear, Workshop on Languages, Compilers, and Hardware Support for Transactional Computing (TRANSACT), June 2006. In conjunction with PLDI'06. Earlier, extended version available as TR 887, Computer Science Department, University of Rochester, Dec. 2005, revised Mar. 2006.

• ``Compatible Phase Co-Scheduling on a CMP of Multi-Threaded Processors'', A. El-Moursy, R. Garg, D. H. Albonesi, and S. Dwarkadas, International Parallel and Distributed Processing Symposium, April 2006.

• ``Low Traffic Overlay Networks with Large Routing Tables'', C. Tang, M. Buco, R. N. Chang, S. Dwarkadas, L. Z. Luan, E. So, and C. Ward, ACM SIGMETRICS, June 2005.

• ``Partitioning Multi-Threaded Processors with a Large Number of Threads'', A. El-Moursy, R. Garg, D. H. Albonesi, and S. Dwarkadas, International Symposium on Performance Analysis of Systems and Software (ISPASS), March 2005.

• ``Profile-Driven Component Placement for Cluster-Based Online Services'', C. C. Stewart, K. Shen, S. Dwarkadas, M. L. Scott, and J. Yin, Work-in-progress track, 5th ACM/IFIP/USENIX International Middleware Conference, Toronto, October 2004.

• ``On Scaling Latent Semantic Indexing for Large Peer-to-Peer Systems'', C. Tang, S. Dwarkadas, and Z. Xu, 27th Annual International ACM SIGIR Conference, July 2004.

• ``Hiding Synchronization Delays in a GALS Processor Microarchitecture'', G. Semeraro, D.H. Albonesi, G. Magklis, M.L. Scott, S.G. Dropsho, and S. Dwarkadas, 10th International Symposium on Asynchronous Circuits and Systems, April 2004.

• ``Integrating Remote Invocation and Distributed Shared State'', C. Tang, D. Chen, S. Dwarkadas, and M. L. Scott. 18th International Parallel and Distributed Processing Symposium (IPDPS), April 2004.

• ``Hybrid Global-Local Indexing for Efficient Peer-to-Peer Information Retrieval'', C. Tang and S. Dwarkadas. First Symposium on Networked Systems Design and Implementation (NSDI04), March 2004.

• ``Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches'', R. Balasubramonian, V. Srinivasan, S. Dwarkadas, and A. Buyuktosunoglu, 3rd Workshop on Power-Aware Computer Systems (PACS), held in conjunction with MICRO-36 , San Diego, December 2003.

• ``Garbage Collector Assisted Memory Offloading for Memory-Constrained Devices'', D. Chen, A. Messer, D. Milojicic, and S. Dwarkadas, 5th IEEE Workshop on Mobile Computing Systems and Applications (WMCSA'03) , October 2003.

• ``Characterizing and Predicting Program Behavior and its Variability'', E. Duesterwald, C. Cascaval, and S. Dwarkadas, International Conference on Parallel Architectures and Compilation Techniques (PACT) , September 2003.

• ``Peer-to-Peer Information Retrieval Using Self-Organizing Semantic Overlay Networks'', C. Tang, Z. Xu and S. Dwarkadas, ACM conference of the Special Interest Group on Data Communication - SIGCOMM 2003 , August 2003.

• Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors, R. Balasubramonian, S. Dwarkadas, and D. Albonesi, International Symposium on Computer Architecture , June 2003.

• ``Exploiting High-level Coherence Information to Optimize Distributed Shared State'', D. Chen, C. Tang, B. Sanders, S. Dwarkadas, and M. L. Scott, 9th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming , June 2003.

• ``Distributed Shared State'', position paper, M. L. Scott, D. Chen, S. Dwarkadas, and C. Tang, International Workshop on the Future Trends of Distributed Computing Systems, May 2003.

• ``Efficient Distributed Shared State for Heterogeneous Machine Architectures'', C. Tang, D. Chen, S. Dwarkadas, and M. L. Scott, International Conference on Distributed Computing Systems, May 2003.

• ``Managing Static Leakage Energy in Microprocessor Functional Units'', S. Dropsho, V. Kursun, D. Albonesi, S. Dwarkadas, and E. Friedman, International Symposium on Microarchitecture, November 2002.

• ``Dynamic Frequency and Voltage Control for a Multiple Clock Domain Microarchitecture'', G. Semeraro, D. Albonesi, S. Dropsho, G. Magklis, S. Dwarkadas, and M. L. Scott, International Symposium on Microarchitecture, November 2002.

• ``Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power'', S. Dropsho, A. Buyuktosunoglu, R. Balasubramonian, D. Albonesi, S. Dwarkadas, G. Semeraro, G. Magklis, and M. L. Scott, International Conference on Parallel Architectures and Compilation Techniques, September 2002.

• Multi-level Shared State for Distributed Systems, D.-Q. Chen, C. Tang, X. Chen, S. Dwarkadas, and M. L. Scott, International Conference on Parallel Processing, August 2002. Best paper award.

• ``A Technique for Adaptation to Available Resources on Clusters Independent of Synchronization Methods Used'', U. Rencuzogullari and S. Dwarkadas, International Conference on Parallel Processing, August 2002.

• ``JVM for a Heterogeneous Shared Memory System'', D. Chen, C. Tang, S. Dwarkadas, and M. L. Scott. Workshop on Caching, Coherence, and Consistency (WC3 '02), New York, NY, June 2002.

• ``Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling'', G. Semeraro, G. Magklis, R. Balasubramonian, D. Albonesi, S. Dwarkadas, and M. L. Scott, 8th International Symposium on High-Performance Computer Architecture, February 2002.

• ``Reducing the Complexity of the Register File in Dynamic Superscalar Processors'', R. Balasubramonian, S. Dwarkadas, and D. Albonesi, 34th International Symposium on Microarchitecture, December 2001.

• Dynamically Allocating Processor Resources Between Nearby and Distant ILP, , R. Balasubramonian, S. Dwarkadas, and D. Albonesi, 28th International Symposium on Computer Architecture, July 2001.

• Dynamic Adaptation to Available Resources for Parallel Computing in an Autonomous Network of Workstations, U. Rencuzogullari and S. Dwarkadas, 8th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, June 2001.

• Shared State for Client-Server Mining , S. Parthasarathy and S. Dwarkadas, 1st SIAM International Conference on Data Mining (SDM 2001), April 2001.

• Memory Hierarchy Reconfiguration for Energy and Performance in General-Purpose Processor Architectures, R. Balasubramonian, D. Albonesi, A. Buyuktosunoglu, and S. Dwarkadas, 33rd International Symposium on Microarchitecture, December 2000.

• ``Dynamic Memory Hierarchy Performance Optimization'', R. Balasubramonian, D. Albonesi, A. Buyuktosunoglu, and S. Dwarkadas, Workshop on Solving the Memory Wall Problem, held in conjunction with the 27th Annual International Symposium on Computer Architecture, June 2000.

• InterWeave: A Middleware System for Distributed Shared State, D. Chen, S. Dwarkadas, S. Parthasarathy, E. Pinheiro, and M. L. Scott, in Proceedings of the 5th workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers, May 2000.

• S-DSM for Heterogeneous Machine Architectures, E. Pinheiro, D. Chen, S. Dwarkadas, S. Parthasarathy, and M. L. Scott, in Proceedings of the 2nd Workshop on Software Distributed Shared Memory held in conjunction with the International Conference on Supercomputing, May 2000.

• The Effect of Network Total Order, Broadcast, and Remote-Write Capability on Network-Based Shared Memory Computing , R. Stets. S. Dwarkadas, L. Kontothanassis, U. Rencuzogullari, and M. L. Scott, 6th International Symposium on High-Performance Computer Architecture, January 2000.

• Incremental and Interactive Sequence Mining , S. Parthasarathy, M. J. Zaki, M. Ogihara, and S. Dwarkadas, Eighth International Conference on Information and Knowledge Management (CIKM), November 2-6, 1999.

• Active Mining in a Distributed Setting, S. Parthasarathy, S. Dwarkadas, and M. Ogihara, SIGKDD Workshop on Large-Scale Parallel KDD Systems, in conjunction with the International Conference on Knowledge Discovery and Data Mining, KDD99, August 1999.

• Cashmere-VLM: Remote Memory Paging for Software Distributed Shared Memory, S. Dwarkadas, N. Hardavellas, L. Kontothanassis, R. Nikhil, and R. Stets, International Parallel Processing Symposium (IPPS/SPDP), April 1999.

• Comparative Evaluation of Fine- and Coarse-Grain Software Distributed Shared Memory, S. Dwarkadas, K. Gharachorloo, L. Kontothanassis, D. J. Scales, M. L. Scott, and R. J. Stets, 5th International Symposium on High-Performance Computer Architecture, January 1999.

• Compiler and Run-Time Support for Adaptive Load Balancing in Software Distributed Shared Memory Systems, S. Ioannidis and S. Dwarkadas, Fourth Workshop on Languages, Compilers, and Run-time Systems for Scalable Computers, May 1998.

• InterAct: Virtual Sharing for Interactive Client-Server Applications, S. Parthasarathy and S. Dwarkadas, Fourth Workshop on Languages, Compilers, and Run-time Systems for Scalable Computers, May 1998.

• Cashmere-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network, R. Stets, S. Dwarkadas, N. Hardavellas, G. Hunt, L. Kontothanassis, S. Parthasarathy, and M. L. Scott, Symposium on Operating Systems Principles, October 1997.

• Evaluating the Trade-Offs in the Parallelization of Probabilistic Search Algorithms, R. L. Carceroni, W. Meira Jr., R. Stets, and S. Dwarkadas, Proceedings of the 9th Brazilian Symposium on Computer Architecture and High Performance Processing, October 1997.

• Compiler and Software Distributed Shared Memory Support for Irregular Applications, with H. Lu, A. L. Cox, R. Rajamony, and W. Zwaenepoel, Symposium on the Principles and Practice of Parallel Programming, 1997.

• VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks, with Leonidas Kontothanassis, Galen Hunt, Robert Stets, Nikolaos Hardavellas, Michal Cierniak, Srinivasan Parthasarathy, Wagner Meira, and Michael Scott, Proceedings of the Twentyfourth International Symposium on Computer Architecture, June 1997.

• Evaluating the Performance of Software Distributed Shared Memory as a Target for Parallelizing Compilers, with A. L. Cox, H. Lu, and W. Zwaenepoel, International Parallel Processing Symposium, April 1997.

• Efficient Use of Memory-Mapped Network Interfaces for Shared Memory Computing, with N. Hardavellas, G. C. Hunt, S, Ioannidis, R. Stets, L. Kontothanassis, and M. L. Scott, TCCA Newsletter, March 1997.

• Software DSM Protocols that Adapt between Single Writer and Multiple Writer, with C. Amza, A. L. Cox, and W. Zwaenepoel, 3rd International Symposium on High-Performance Computer Architecture, February 1997.

• An Integrated Compile-Time/Run-Time Software Distributed Shared Memory System, with A. L. Cox and W. Zwaenepoel, Architectural Support for Programming Languages and Operating Systems, October 1996.

• A Comparison of Entry Consistency and Lazy Release Consistency Implementations, with S. V. Adve, A. L. Cox, R. Rajamony, and W. Zwaenepoel, 2nd International Symposium on High-Performance Computer Architecture, February 1996.

• Message Passing Versus Distributed Shared Memory on Networks of Workstations, with A.L. Cox, H. Lu, and W. Zwaenepoel, in Proceedings of Supercomputing '95, December 1995.

• An Integrated Approach to Distributed Shared Memory, with A.L. Cox, P. Keleher, and W. Zwaenepoel, First International Workshop on Parallel Processing, December 1994.

• Software vs. Hardware Shared Memory Implementation: A Case Study, with A.L. Cox, P. Keleher, H. Lu, R. Rajamony, and W. Zwaenepoel, Proceedings of the Twentyfirst International Symposium on Computer Architecture, pp. 106-117, April 1994.

• TreadMarks: Distributed Shared Memory on Standard Workstations and Operating Systems, with A.L. Cox, P. Keleher, and W. Zwaenepoel, Proceedings of the Winter 94 Usenix Conference, pp. 115-131, January 1994.

• Evaluation of Release Consistent Software Distributed Shared Memory on Emerging Network Technology, with A.L. Cox, P. Keleher, and W. Zwaenepoel, Proceedings of the Twentieth International Symposium on Computer Architecture, pp. 144-155, May 1993.

• Network Multicomputing Using Recoverable Distributed Shared Memory, with J.B. Carter et al., Proceedings of CompCon '93, pp. 515-523, February 1993.

• Execution-driven Simulation of Shared Memory Multiprocessors, with J. R. Jump, R. Mukherjee, and J. B. Sinclair, SCS Western Multiconference, January 1993.

• Willow: A Scalable Shared Memory Multiprocessor, with J. K. Bennett, J. Greenwood, and E. W. Speight, Supercomputing '92, November 1992.

• Efficient Simulation of Cache Memories, with J. R. Jump J. B. Sinclair, invited paper, Winter Simulation Conference, December 1989.

TECHNICAL REPORTS NOT PUBLISHED ELSEWHERE

• Compiler-Directed Selective Update Mechanisms for Software Distributed Shared Memory, with A. L. Cox, H. Lu, and W. Zwaenepoel, Technical Report TR95-253, Rice University, 1995.

• Replacing Locks by Higher-Level Primitives, with S. V. Adve, A. L. Cox, and W. Zwaenepoel, Technical Report TR94-237, Rice University, 1994.