ASSUMED ATTENDEE BACKGROUND: Intermediate
IA-64 is Intel's 64-bit instruction set architecture. IA-64 was co-developed with HP starting in 1994. Recently, Intel and HP have made public disclosures regarding the instruction set architecture. Since the design philosophy behind IA-64 is based on separating functionality between dynamic (runtime) and static (compile time), this tutorial covers an overview of IA-64 architecture and how to use its features to optimize code and compiler technology for implementing such transformations. Since dynamic compilation/dynamic translators are becoming a mainstream technology, we also provide a brief introduction to Java and dynamic compilation on IA-64.
The optimization section of the tutorial will describe specific optimizations that take advantage of IA-64 features, when to apply such transformations, and general considerations that should be taken in to account when and when not to apply the transformations.
The compiler section of the tutorial will describe compiler technology on IA-64 architecture, which includes special optimizations particularly designed for the architectural features. The section will discuss the integration of these special optimizations with conventional compiler components in IA-64 compiler design. The tutorial will briefly describe dynamic compilation technology such as JVM/JIT on IA-64 as well.
Dr. Jesse Fang is a principal software engineer and is managing Compilers/Java Research lab in MRL (Microprocessor Research Lab) at Intel. Before join Intel in 1995, Jesse was working on ILP prototype compiler at Hewlett-Packard Research Labs at Pola Alto. Before worked on HP Labs, Jesse worked on parallel/vectorized compiler on Convex Computer Corp. and Concurrent Computer Corp. respectively. Jesse was working at CSRD (Center for Supercomputer Research and Devellopment) at Univ of Illinois as visiting professor after he got his Ph.D. in Computer Science at University of Nebraska-Lincon in 1984.
Wei Li leads and manages the high-level optimizer group for the IA-64 compiler. He has published many research papers in the areas of compiler optimizations, parallel and distributed computing, and scalable data mining. He received his Ph.D. in computer science from Cornell University. His e-mail address is wei.li@intel.com.
Dr. Allan Knies is a Senior Computer Architect with Intel Corporation. He has worked on the first three generations of IA-64 processors specializing in architecture, compiler technology, and performance analysis. He is currently reponsible for issues relating to the application architecture, leading an experimental compiler team, and working on new features for the IA-64 application level architecture. Dr. Knies has a B.S. in Mathematics and Computer Science from Ohio University, an M.S. in Computer Science from Purdue University, and a Ph.D. from the School of Electrical and Computer Engineering at Purdue. He is a member of Phi Beta Kappa and Eta Kappa Nu.